Effect of short circuit aging on safe operating area of SiC MOSFET

2018 ◽  
Vol 88-90 ◽  
pp. 645-651 ◽  
Author(s):  
Tien Anh Nguyen ◽  
Stéphane Lefebvre ◽  
Stéphane Azzopardi
2016 ◽  
Vol 64 ◽  
pp. 415-418 ◽  
Author(s):  
S. Mbarek ◽  
F. Fouquet ◽  
P. Dherbecourt ◽  
M. Masmoudi ◽  
O. Latry

2012 ◽  
Vol 717-720 ◽  
pp. 1045-1048 ◽  
Author(s):  
Woong Je Sung ◽  
B.J. Baliga ◽  
Alex Q. Huang

This paper aims to introduce a solid-state fault isolation device (FID) for the short circuit protection application in the power distribution systems. The key performance of a FID is to have a low on-state loss and a strong short circuit safe operating area (SCSOA). As a FID, a novel 15kV 4H-SiC field controlled diode (FCD) with a p+buried layer is proposed to provide an improved trade-off between the on-state forward voltage drop and the saturation current. Dynamic response to the fault and the application example of the proposed FCD are described in this paper.


1991 ◽  
Vol 38 (2) ◽  
pp. 303-309 ◽  
Author(s):  
N. Iwamuro ◽  
A. Okamoto ◽  
S. Tagami ◽  
H. Motoyama

2018 ◽  
Vol 88-90 ◽  
pp. 219-224 ◽  
Author(s):  
Shawki Douzi ◽  
Moncef Kadi ◽  
Habib Boulzazen ◽  
Mohamed Tlig ◽  
Jaleleddine Ben Hadj Slama

Author(s):  
Martin Pfost ◽  
Christian Unger ◽  
Gabriel Cretu ◽  
Marius Cenusa ◽  
Kevni Buyuktas ◽  
...  
Keyword(s):  

2018 ◽  
Vol 33 (2) ◽  
pp. 1075-1086 ◽  
Author(s):  
Yuxiang Chen ◽  
Wuhua Li ◽  
Francesco Iannuzzo ◽  
Haoze Luo ◽  
Xiangning He ◽  
...  

2016 ◽  
Vol 856 ◽  
pp. 362-367 ◽  
Author(s):  
Georgios E. Kampitsis ◽  
Stavros A. Papathanassiou ◽  
Stefanos N. Manias

In this paper, the performance of silicon (Si) and silicon carbide (SiC) power MOSFETs during short circuits is investigated. The response of both semiconductors is examined under hard switch fault and fault under load conditions using a short circuit tester board. In addition, their failure mechanism is recorded and analyzed. Examination results show that the SiC MOSFET fails in the energy limiting mode, due to gate oxide rupture, while the Si MOSFET is destructed during the power limiting mode, at the beginning of the fault. The electro-thermal characterization of these devices is performed through three-dimensional finite element analysis, utilizing the experimentally extracted power dissipation for each transistor. Simulation results confirm the exceptional ruggedness that SiC power MOSFETs exhibit outside their safe operating area.


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