Selected Problems of Power MOSFETs Thermal Parameters Measurements

In the paper, selected problems that are related to the measurements of thermal parameters of power MOSFETs that are placed on a common heat sink are analysed. The application of the indirect electrical method, the contact method, and the optical method in measuring self and mutual transient thermal impedances of these transistors is presented. The circuits that are required to perform measurements are presented and described. The errors of measurements are assessed for each of the considered methods. In the case of the indirect electrical method, an additional influence of the selection of a thermo-sensitive parameter and the function approximating thermometric characteristics on the measurement error are taken into consideration. The measurement results of the thermal parameters of the investigated transistors that were obtained using the considered measurement methods in various supply conditions are presented and discussed.

The Road to a Robust and Affordable SiC Power MOSFET Technology

This article provides a detailed study of performance and reliability issues and trade-offs in silicon carbide (SiC) power MOSFETs. The reliability issues such as threshold voltage variation across devices from the same vendor, instability of threshold voltage under positive and negative gate bias, long-term reliability of gate oxide, screening of devices with extrinsic defects by means of gate voltage, body diode degradation, and short circuit withstand time are investigated through testing of commercial devices from different vendors and two-dimensional simulations. Price roadmap and foundry models of SiC MOSFETs are discussed. Future development of mixed-mode CMOS circuits with high voltage lateral MOSFETs along with 4−6× higher power handling capability compared to silicon circuits has been described.

Degradation mechanisms analysis for SiC power MOSFETs under repetitive power cycling stress

In this work, investigation on the degradation behavior of the 1.2-kV/52-A silicon carbide (SiC) power MOSFETs subjected to repetitive slow power cycling stress have been performed. Electric characteristics have been characterized periodically over the stress and the respective degradation mechanisms also have been analysed. A comprehensive degradation analysis is further conducted after the aging test by virtue of the X-ray inspection system, Scanning Acoustic Microscope (SAM), Scanning Electron Microscope (SEM) and emission microscope (EMMI), etc. Experimental results reveal that both the degradation of gate oxide on chip-level and the degradation of the bond wire and solder layer on package-level have emerged over the cyclic stress. Specifically, growths of threshold voltage (Vth) and gate leakage current (Igss) are thought to be relevant with the degradation of gate oxide by SiC/SiO2 interface states trapping/de-trapping electron on chip-level, while the appearances of the fatigue of bond wire and the delamination of solder layer imply the degradation on package-level. This work may provide some practical guidelines for the assessments towards the reliability of SiC power MOSFETs in power conversion system.