Safe and Deterministic Real-Time Programming in a Nondeterministic Parallel Processing System

1992 ◽  
Vol 25 (11) ◽  
pp. 161-166
Author(s):  
P.R. Croll
2012 ◽  
Vol 6-7 ◽  
pp. 659-664
Author(s):  
En Shun Kang ◽  
Yu Xi Zhao

Traditional median filter algorithm has the long processing time, which goes against the real-time image processing. According to its shortcomings, this paper puts forward the rapid median filter algorithm, and uses DE2 board of the company called Altera to do the realization on FPGA (CycloneII 2C35). The experimental results show that the image pre-processing system is able to complete a variety of high-level image algorithms in milliseconds, and FPGA's parallel processing capability and pipeline operations can dramatically improve the speed of image processing, so the FPGA-based image processing system has broad prospects for development.


2013 ◽  
Vol 278-280 ◽  
pp. 1043-1046
Author(s):  
Xin Cheng ◽  
Hua Chun Wu

Rapid increases in the complexity of algorithms for real-time signal processing applications have made multi-processors parallel processing technology needed. This paper proposes a design of high-performance real-time bus (RTB), based on which distributed shared memory (DSM) mechanism is established to implement data exchange among multiple processors. Adopting DSM mechanism can reduce the software overhead and improve data processing performance significantly. Definition and implementation details of RTB and data transmission model are discussed. Experimental results show the stable data transmission bandwidth is achieved with performance not affected by the increasing number of processors.


Navigation ◽  
2003 ◽  
Vol 50 (1) ◽  
pp. 57-64 ◽  
Author(s):  
S. V. M. K. PRASAD ◽  
V. VAIDEHI ◽  
P. V. RAMAKRISHNA ◽  
C. N. KRISHNAN ◽  
T. ANANDA SARANGARAM ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document