A Formal Proof of Correctness

2012 ◽  
pp. 408-410
Author(s):  
Jeff Edmonds
VLSI Design ◽  
1999 ◽  
Vol 9 (2) ◽  
pp. 105-117 ◽  
Author(s):  
M. S. Krishnamoorthy ◽  
James R. Loy ◽  
John F. McDonald

Noise margins in high speed digital systems continue to erode. Full differential signal routing provides a mechanism for deferring these effects. This paper proposes a three stage routing process for solving the adjacent placement routing problem of differential signal pairs, and proves that it is optimal. The process views differential pairs as logical nets; routes the logical nets; then bifurcates the result to achieve a physical realization. Finite state machine theory provides the critical theoretical underpinning and formal proof of correctness necessary for linear time bifurcation. Regular expressions map the theoretical solution to an appropriate implementation strategy that employs feature vectors for net recognition.


2013 ◽  
Vol 9 (1) ◽  
pp. 964-975
Author(s):  
Danilo Valeros Bernardo

In this paper, three security mechanisms developed to form the UDT (UDP-Data Transfer protocol) Security Architecture are evaluated and analyzed. An approach is utilized to ascertain the applicability and secrecy properties of the selected security mechanisms when implemented with UDT. In this approach, a formal proof of correctness, through formal composition logic is carried out. This approach is modular; it has a separate proof for each protocol section that provides insight into the network environment in which each section can be reliably employed. Moreover, the proof holds for a variety of failure recovery strategies and other implementation and configuration options.This paper is an  extension and a revised version of the works published by the author.


2015 ◽  
Vol 19 (6) ◽  
pp. 57-68
Author(s):  
D. A. Chkliaev ◽  
V. A. Nepomniaschy

We consider the well-known Sliding Window Protocol which provides reliable and efficient transmission of data over unreliable channels. A formal proof of correctness for this protocol faces substantial difficulties caused by a high degree of parallelism which creates a significant potential for errors. Here we consider a version of the protocol that is based on selective repeat of frames. The specification of the protocol by a state machine and its safety property are represented in the language of the verification system PVS. Using the PVS system, we give an interactive proof of this property of the Sliding Window Protocol.


Author(s):  
Rob Nederpelt ◽  
Herman Geuvers
Keyword(s):  

Author(s):  
Dang Duy Bui ◽  
Kazuhiro Ogata

AbstractThe mutual exclusion protocol invented by Mellor-Crummey and Scott (called MCS protocol) is used to exemplify that state picture designs based on which the state machine graphical animation (SMGA) tool produces graphical animations should be better visualized. Variants of MCS protocol have been used in Java virtual machines and therefore the 2006 Edsger W. Dijkstra Prize in Distributed Computing went to their paper on MCS protocol. The new state picture design of a state machine formalizing MCS protocol is assessed based on Gestalt principles, more specifically proximity principle and similarity principle. We report on a core part of a formal verification case study in which the new state picture design and the SMGA tool largely contributed to the successful completion of the formal proof that MCS protocol enjoys the mutual exclusion property. The lessons learned acquired through our experiments are summarized as two groups of tips. The first group is some new tips on how to make state picture designs. The second one is some tips on how to conjecture state machine characteristics by using the SMGA tool. We also report on one more case study in which the state picture design has been made for the mutual exclusion protocol invented by Anderson (called Anderson protocol) and some characteristics of the protocol have been discovered based on the tips.


Author(s):  
Giles Reger ◽  
David Rydeheard

AbstractParametric runtime verification is the process of verifying properties of execution traces of (data carrying) events produced by a running system. This paper continues our work exploring the relationship between specification techniques for parametric runtime verification. Here we consider the correspondence between trace-slicing automata-based approaches and rule systems. The main contribution is a translation from quantified automata to rule systems, which has been implemented in Scala. This then allows us to highlight the key differences in how the two formalisms handle data, an important step in our wider effort to understand the correspondence between different specification languages for parametric runtime verification. This paper extends a previous conference version of this paper with further examples, a proof of correctness, and an optimisation based on a notion of redundancy observed during the development of the translation.


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