Bus connected neural network hardware system

1994 ◽  
Vol 30 (12) ◽  
pp. 979-980 ◽  
Author(s):  
T. Kurokawa ◽  
H. Yamashita
Keyword(s):  
Neural Network ◽  
Hardware System ◽  
Neural Network Hardware

Wafer‐Scale 2D Hafnium Diselenide Based Memristor Crossbar Array for Energy‐Efficient Neural Network Hardware

2021 ◽  
pp. 2103376 ◽  
Author(s):  
Sifan Li ◽  
Mei‐Er Pam ◽  
Yesheng Li ◽  
Li Chen ◽  
Yu‐Chieh Chien ◽  
...  
Keyword(s):  
Neural Network ◽  
Energy Efficient ◽  
Wafer Scale ◽  
Crossbar Array ◽  
Neural Network Hardware ◽  
Memristor Crossbar

scholarly journals Pattern Classification of Fabric Defects Using a Probabilistic Neural Network and Its Hardware Implementation using the Field Programmable Gate Array System

2017 ◽  
Vol 25 (0) ◽  
pp. 42-48 ◽  
Author(s):  
Abul Hasnat ◽  
Anindya Ghosh ◽  
Amina Khatun ◽  
Santanu Halder
Keyword(s):  
Neural Network ◽  
Hardware Implementation ◽  
Probabilistic Neural Network ◽  
Clock Period ◽  
Data Set ◽  
Gate Arrays ◽  
Hardware System ◽  
Field Programmable ◽  
Programmable Gate Arrays

This study proposes a fabric defect classification system using a Probabilistic Neural Network (PNN) and its hardware implementation using a Field Programmable Gate Arrays (FPGA) based system. The PNN classifier achieves an accuracy of 98 ± 2% for the test data set, whereas the FPGA based hardware system of the PNN classifier realises about 94±2% testing accuracy. The FPGA system operates as fast as 50.777 MHz, corresponding to a clock period of 19.694 ns.

Surrogate Model based Co-Optimization of Deep Neural Network Hardware Accelerators

2021 ◽  
Author(s):  
Hendrik Wohrle ◽  
Mariela De Lucas Alvarez ◽  
Fabian Schlenke ◽  
Alexander Walsemann ◽  
Michael Karagounis ◽  
...  
Keyword(s):  
Neural Network ◽  
Surrogate Model ◽  
Deep Neural Network ◽  
Hardware Accelerators ◽  
Model Based ◽  
Neural Network Hardware
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