scholarly journals A fractional time‐step simulation method suitable for the associated discrete circuit model of power electronic system

Author(s):  
Pan Wu ◽  
Jin Xu ◽  
Keyou Wang ◽  
Zirun Li ◽  
Guojie Li
2011 ◽  
Vol 131 (1) ◽  
pp. 110-117
Author(s):  
Toshiji Kato ◽  
Kaoru Inoue ◽  
Yoshihiro Fujiwara

Author(s):  
Jianhua Li ◽  
Jingyuan Chen ◽  
Yan Wang ◽  
Jianhua Huang

The parallelization of silicon anisotropic etching simulation with the cellular automata (CA) model on graphics processing units (GPUs) is challenging, because the numbers of computational tasks in etching simulation dynamically change and the existing parallel CA mechanisms do not fit in GPU computation well. In this paper, an improved CA model, called clustered cell model, is proposed for GPU-based etching simulation. The model consists of clustered cells, each of which manages a scalable number of atoms. In this model, only the etching and update of states for the atoms on the etching surface and their unexposed neighbors are performed at each CA time step, whereas the clustered cells are reclassified in a longer time step. With this model, a crystal cell parallelization method is given, where clustered cells are allocated to threads on GPUs in the simulation. With the optimizations from the spatial and temporal aspects as well as a proper granularity, this method provides a faster process simulation. The proposed simulation method is implemented with the Compute Unified Device Architecture (CUDA) application programming interface. Several computational experiments are taken to analyze the efficiency of the method.


2020 ◽  
Vol 13 (11) ◽  
pp. 2212-2221
Author(s):  
Lei Zhang ◽  
Jiangchao Qin ◽  
Di Shi ◽  
Zhiwei Wang

Sign in / Sign up

Export Citation Format

Share Document