We investigated the effect of amorphous silicon pattern design regarding to light induced
leakage current in amorphous silicon thin film transistor. In addition to conventional design, where
amorphous silicon layer is protruding outside the gate electrode, we designed and fabricated
amorphous silicon thin film transistors in another two types of bottom gated structure. The one is that
the amorphous silicon layer is located completely inside the gate electrode and the other is that the
amorphous silicon layer is protruding outside the gate electrode but covered completely by the source
and drain electrode. Measurement of the light induced leakage current caused by backlight revealed
that the design where the amorphous silicon is located inside the gate electrode was the most effective
however the last design was also effective in reducing the leakage current about one order lower than
that of the conventional design.
A highly porous and conductive composite gate electrode for OTFT sensors
