scholarly journals Numerical Analysis of CW Raman Amplifier in Silicon-on-Insulator Nano-Waveguides

Author(s):  
Z S Khaleefa ◽  
Sh S Mahdi ◽  
S Kh Yaseen
2019 ◽  
Vol 9 (12) ◽  
pp. 2457 ◽  
Author(s):  
Goki ◽  
Imran ◽  
Porzi ◽  
Toccafondo ◽  
Fresi ◽  
...  

The role of a semiconductor optical amplifier (SOA) for amplifying downstream traffic at optical network terminals (ONT) within a silicon-photonics integrated receiver in a high capacity passive optical network (PON) is investigated. The nearly traveling wave SOA effects are evaluated by considering fabrication and link loss constraints through numerical analysis and experimental validation. The impact of hybrid integration of a SOA chip on a silicon on insulator (SOI) photonic chip using the flip chip bonding technique on SOA design is evaluated through numerical analysis of a multi section cavity model. The performance of the proposed ONT receiver design employing twin parallel SOAs is evaluated experimentally on a 32 × 25 Gb/s OOK WDM transmission system considering cross gain modulation (XGM) and amplified spontaneous emission (ASE) constraints. The XGM impact is evaluated through 32 channel wavelength division multiplexing (WDM) transmission and a likely PON worst case scenario of high channel power difference (~10 dB) between adjacent channels. The impact of ASE is evaluated through the worst-case polarization condition, i.e., when all of the signal is coupled to only one. Successful transmission was achieved in both worst-case conditions with limited impact on performance. SOA results indicate that a maximum residual facet reflectivity of 4 × 10−4 for the chip-bonded device can lead to a power penalty below 2 dB in a polarization-diversity twin SOAs receiver.


Applied laser ◽  
2012 ◽  
Vol 32 (2) ◽  
pp. 134-139
Author(s):  
刘晨星 Liu Chenxing ◽  
张大勇 Zhang Dayong ◽  
付博 Fu Bo ◽  
李阳龙 Li Yanglong ◽  
任攀 Ren Pan

2009 ◽  
Vol 27 (20) ◽  
pp. 4610-4618 ◽  
Author(s):  
De-Gui Sun ◽  
Xiaoqi Li ◽  
Dongxia Wong ◽  
Yuan Hu ◽  
Fangliang Luo ◽  
...  

Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.


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