Amorphous-silicon thin-film transistors with very high field-effect mobility

1991 ◽  
Vol 12 (3) ◽  
pp. 120-121 ◽  
Author(s):  
Jyh-Ling Lin ◽  
Wen-Jyh Sah ◽  
Si-Chen Lee
1993 ◽  
Vol 297 ◽  
Author(s):  
Byung Chul Ahn ◽  
Jeong Hyun Kim ◽  
Dong Gil Kim ◽  
Byeong Yeon Moon ◽  
Kwang Nam Kim ◽  
...  

The hydrogenation effect was studied in the fabrication of amorphous silicon thin film transistor using APCVD technique. The inverse staggered type a-Si TFTs were fabricated with the deposited a-Si and SiO2 films by the atmospheric pressure (AP) CVD. The field effect mobility of the fabricated a-Si TFT is 0.79 cm2/Vs and threshold voltage is 5.4V after post hydrogenation. These results can be applied to make low cost a-Si TFT array using an in-line APCVD system.


2015 ◽  
Vol 36 (8) ◽  
pp. 793-795 ◽  
Author(s):  
Jae Hyo Park ◽  
Ki Hwan Seok ◽  
Hyung Yoon Kim ◽  
Sol Kyu Lee ◽  
Hee Jae Chae ◽  
...  

1992 ◽  
Vol 258 ◽  
Author(s):  
J.L. Andújar ◽  
E. Bertrán ◽  
A. Canillas ◽  
J. Campmany ◽  
J. Cifre

ABSTRACTNormal staggered hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFT) were prepared by rf plasma deposition through a three-step process. The TFTs were constituted by an a-SiN/a-Si:H structure grown on NiCr source-drain electrodes evaporated on glass substrates. The intrinsic a-Si:H active layer (Fermi level at EC-EF = 0.7 eV) was deposited from pure SiH4 rf plasma, and the insulator layer of a-SiN was grown using a high rf power plasma (200 mW/cm2) of SiH4-N2 mixture with a SiH4 fraction of 0.5 %. Ellipsometric measurements showed that a very transparent a-SiN film was grown with an abrupt interface insulator/a-Si:H. TFTs with 0.2 μm thick a-Si:H layer and 10 μm channel length have on-off current ratios of 5 104, electron field effect mobility of 1.5 cm2/V-s (dielectric constant εri ≈ 7.9), and threshold voltage around 5 V. The results are discussed in terms of low hydrogen content and low porosity of these a-SiN films prepared from silane-nitrogen.


1995 ◽  
Vol 377 ◽  
Author(s):  
H. C. Slade ◽  
M. S. Shur ◽  
M. Hack

ABSTRACTOn the basis of our experimental studies of the temperature dependence of amorphous silicon thin film transistor current-voltage and capacitance-voltage characteristics, we have developed an analytical device model suitable for implementation in circuit simulators. This model describes the above-threshold (on) current and the subthreshold (off) current [1]. In addition, the model is able to incorporate changes in the distribution of localized states which arise from thermal and/or bias stress. In this paper, we identify the temperature-dependent parameters, which describe the temperature dependence of both the on and off currents, and we model the leakage current at large negative gate biases. The modeling results are in good agreement with our experimental data. We also discuss capacitance-voltage characteristics of amorphous silicon thin film transistors for varying gate lengths, temperatures, and frequencies. The measured capacitance-voltage characteristics show strong frequency dispersion, which is related to the trap-limited transport of carriers in the channel. The characteristic time constant, which determines when the channel capacitance becomes dependent on frequency, is on the order of the transit time calculated with the field-effect mobility and the electric field. The field-effect mobility takes into account carrier trapping by the localized states and is a function of gate voltage and temperature.


2004 ◽  
Vol 338-340 ◽  
pp. 732-735 ◽  
Author(s):  
H. Gleskova ◽  
P.I. Hsu ◽  
Z. Xi ◽  
J.C. Sturm ◽  
Z. Suo ◽  
...  

1997 ◽  
Vol 467 ◽  
Author(s):  
H. C Slade ◽  
M. S. Shur ◽  
T. Ytterdal

ABSTRACTThe large number of localized energy states in amorphous and polysilicon thin film transistors causes non-crystalline effects in both the DC and AC transistor characteristics. The observed frequency dispersion of the device capacitances is linked to the characteristic times of electron trapping and emission from localized thin film transistors and is modeled analytically by introducing effective RC time constants, which are proportional to the electron transit times, determined by the field effect mobility. The small-signal gate-to-source and gate-to-drain capacitances have been derived using Meyer's approach, which takes into account the non-zero drain-source voltage to achieve a partitioning of the channel capacitance. We have verified the model for amorphous silicon thin film transistors for varying gate lengths and frequencies.


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