Conductance modulation techniques in switched-capacitor DC-DC converter for maximum-efficiency tracking and ripple mitigation in 22nm Tri-gate CMOS

Author(s):  
Rinkle Jain ◽  
Stephen Kim ◽  
Vaibhav Vaidya ◽  
James Tschanz ◽  
Krishnan Ravichandran ◽  
...  
2015 ◽  
Vol 50 (8) ◽  
pp. 1809-1819 ◽  
Author(s):  
Rinkle Jain ◽  
Stephen T. Kim ◽  
Vaibhav Vaidya ◽  
Krishnan Ravichandran ◽  
James W. Tschanz ◽  
...  

2020 ◽  
Author(s):  
Angelica Paula Caus ◽  
Guilherme Martins Leandro ◽  
Ivo Barbi

This paper presents a new power converter topology<br>generated by the integration of the asymmetrical ZVS-PWM dcdc converter with a switched-capacitor ladder-type commutation<br>cell. Circuit operation and theoretical analysis with emphasis on<br>the soft-commutation process are included in the paper. The<br>main advantage of the proposed converter with respect to the<br>conventional asymmetrical half-bridge dc-dc converter is the<br>reduction of the voltage stress across the power switches to the<br>half of the input dc bus voltage, enabling the utilization of lower<br>voltage rating components. Experiments conducted on a<br>laboratory prototype with 1.4 kW power-rating, 800 V input<br>voltage, 48 V output voltage and 100 kHz switching frequency<br>are included, to verify the theoretical analysis and the design<br>methodology. The maximum efficiency of the experimental nonoptimized prototype was 93.6%.<br>Index Terms - Asymmetrical dc-dc converter, pulse-widthmodulation, switched-capacitor, zero voltage switching.<div><br><br></div>


2020 ◽  
Author(s):  
Angelica Paula Caus

This paper presents a new power converter topology<br>generated by the integration of the asymmetrical ZVS-PWM dcdc converter with a switched-capacitor ladder-type commutation<br>cell. Circuit operation and theoretical analysis with emphasis on<br>the soft-commutation process are included in the paper. The<br>main advantage of the proposed converter with respect to the<br>conventional asymmetrical half-bridge dc-dc converter is the<br>reduction of the voltage stress across the power switches to the<br>half of the input dc bus voltage, enabling the utilization of lower<br>voltage rating components. Experiments conducted on a<br>laboratory prototype with 1.4 kW power-rating, 800 V input<br>voltage, 48 V output voltage and 100 kHz switching frequency<br>are included, to verify the theoretical analysis and the design<br>methodology. The maximum efficiency of the experimental nonoptimized prototype was 93.6%.<br>Index Terms - Asymmetrical dc-dc converter, pulse-widthmodulation, switched-capacitor, zero voltage switching.<div><br><br></div>


2020 ◽  
Author(s):  
Angelica Paula Caus ◽  
Guilherme Martins Leandro ◽  
Ivo Barbi

This paper presents a new power converter topology<br>generated by the integration of the asymmetrical ZVS-PWM dcdc converter with a switched-capacitor ladder-type commutation<br>cell. Circuit operation and theoretical analysis with emphasis on<br>the soft-commutation process are included in the paper. The<br>main advantage of the proposed converter with respect to the<br>conventional asymmetrical half-bridge dc-dc converter is the<br>reduction of the voltage stress across the power switches to the<br>half of the input dc bus voltage, enabling the utilization of lower<br>voltage rating components. Experiments conducted on a<br>laboratory prototype with 1.4 kW power-rating, 800 V input<br>voltage, 48 V output voltage and 100 kHz switching frequency<br>are included, to verify the theoretical analysis and the design<br>methodology. The maximum efficiency of the experimental nonoptimized prototype was 93.6%.<br>Index Terms - Asymmetrical dc-dc converter, pulse-widthmodulation, switched-capacitor, zero voltage switching.<div><br><br></div>


Energies ◽  
2020 ◽  
Vol 13 (23) ◽  
pp. 6403
Author(s):  
Zbigniew Waradzyn ◽  
Robert Stala ◽  
Andrzej Mondzik ◽  
Aleksander Skała ◽  
Adam Penczek

This paper presents a concept for the operation of a resonant DC–DC switched-capacitor converter with very high efficiency and output voltage regulation. In its basic concept, such a converter operates as a switched-capacitor voltage doubler (SCVD) in the Zero Current Switching (ZCS) mode with a constant output voltage. The proposed methods of switching allow for the switched-capacitor (SC) converter output voltage regulation, and improve its efficiency by the operation with Zero Voltage Switching (ZVS). In this paper, various switching patterns are proposed to achieve high efficiency and the output voltage control by frequency or duty cycle regulation. Some examples of the application of the proposed switching patterns are presented: in current control at the start-up of the converter, in a bi-directional converter, and in a modular cascaded system. The paper also presents an analytical model as well as the relationships between the switching frequency, voltage ratio and efficiency. Further, it demonstrates the experimental verification of the waveforms, voltage ratios, as well as efficiency. The proposed experimental setup achieved a maximum efficiency of 99.228%. The implementation of the proposed switching patterns with the ZVS operation along with the GaN-based (Gallium Nitride) design, with a planar choke, leads to a high-efficiency and low-volume solution for the SCVD converter and is competitive with the switch-mode step-up converters.


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