ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
Latest Publications

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9781509050253

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Quantizer-less proportional path fractional-N digital PLL with a low-power high-gain time amplifier and background multi-point spur calibration

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094547 ◽

2017 ◽

Author(s):

Minuk Heo ◽

Sunghyun Bae ◽

Jayeol Lee ◽

Cheonsu Kim ◽

Minjae Lee

Keyword(s):

Low Power ◽

High Gain ◽

Time Amplifier

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A 25 Gb/s 60 GHz digital power amplifier in 28nm CMOS

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094562 ◽

2017 ◽

Cited By ~ 5

Author(s):

Kaushik Dasgupta ◽

Saeid Daneshgar ◽

Chintan Thakkar ◽

Kunal Datta ◽

James Jaussi ◽

...

Keyword(s):

Power Amplifier ◽

60 Ghz

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A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120 kHz 1/f3 corner

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094532 ◽

2017 ◽

Cited By ~ 1

Author(s):

Yizhe Hu ◽

Teerachot Siriburanon ◽

Robert Bogdan Staszewski

Keyword(s):

Harmonic Extraction

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A transimpedance amplifier using a widely tunable PVT-independent pseudo-resistor for high-performance current sensing applications

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094530 ◽

2017 ◽

Cited By ~ 8

Author(s):

Denis Djekic ◽

Georg Fantner ◽

Jan Behrends ◽

Klaus Lips ◽

Maurits Ortmanns ◽

...

Keyword(s):

High Performance ◽

Transimpedance Amplifier ◽

Current Sensing ◽

Sensing Applications

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A 43.6-dB SNDR 1-GS/s single-channel SAR ADC using coarse and fine comparators with background comparator offset calibration

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094554 ◽

2017 ◽

Cited By ~ 2

Author(s):

Guanhua Wang ◽

Kexu Sun ◽

Qing Zhang ◽

Salam Elahmadi ◽

Ping Gui

Keyword(s):

Single Channel ◽

Sar Adc ◽

Comparator Offset

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Class-AB and class-J 22 dBm SiGe HBT PAs for X-band radar systems

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094557 ◽

2017 ◽

Cited By ~ 2

Author(s):

P. Scaramuzza ◽

C. Rubino ◽

M. Tiebout ◽

M. Caruso ◽

M. Ortner ◽

...

Keyword(s):

Class Ab ◽

Sige Hbt ◽

Radar Systems ◽

X Band

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A piezoelectric energy harvester interface circuit with adaptive conjugate impedance matching, self-startup and 71% broader bandwidth

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094540 ◽

2017 ◽

Cited By ~ 4

Author(s):

Yifeng Cai ◽

Yiannos Manoli

Keyword(s):

Energy Harvester ◽

Impedance Matching ◽

Interface Circuit ◽

Piezoelectric Energy

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Highly integrated wavelength-locked Si photonic ring transmitter using direct monitoring of drop-port OMA

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094538 ◽

2017 ◽

Author(s):

Saurabh Agarwal ◽

Mark Ingels ◽

Marianna Pantouvaki ◽

Michiel Steyaert ◽

Philippe Absil ◽

...

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A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094546 ◽

2017 ◽

Cited By ~ 5

Author(s):

Hechen Wang ◽

Fa Foster Dai

Keyword(s):

Cmos Technology

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A 16–20 GHz LO system with 115 fs jitter for 24–30 GHz 5G in 28 nm FD-SOI CMOS

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference ◽

10.1109/esscirc.2017.8094573 ◽

2017 ◽

Cited By ~ 5

Author(s):

Staffan Ek ◽

Tony Pahlsson ◽

Anders Carlsson ◽

Andreas Axholt ◽

Anna-Karin Stenman ◽

...

Keyword(s):

28 Nm ◽

Soi Cmos

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ESSCIRC 2017 - 43rd IEEE European Solid State Circuits ConferenceLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Quantizer-less proportional path fractional-N digital PLL with a low-power high-gain time amplifier and background multi-point spur calibration

A 25 Gb/s 60 GHz digital power amplifier in 28nm CMOS

A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120 kHz 1/f3 corner

A transimpedance amplifier using a widely tunable PVT-independent pseudo-resistor for high-performance current sensing applications

A 43.6-dB SNDR 1-GS/s single-channel SAR ADC using coarse and fine comparators with background comparator offset calibration

Class-AB and class-J 22 dBm SiGe HBT PAs for X-band radar systems

A piezoelectric energy harvester interface circuit with adaptive conjugate impedance matching, self-startup and 71% broader bandwidth

Highly integrated wavelength-locked Si photonic ring transmitter using direct monitoring of drop-port OMA

A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology

A 16–20 GHz LO system with 115 fs jitter for 24–30 GHz 5G in 28 nm FD-SOI CMOS

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
Latest Publications