A 0.18 μm CMOS implementation of on-chip analogue test signal generation from digital test patterns

Author(s):  
L. Rolindez ◽  
S. Mir ◽  
G. Prenat ◽  
A. Bounceur
2003 ◽  
Vol 1 ◽  
pp. 235-238
Author(s):  
B. Burdiek ◽  
W. Mathis

Abstract. In this paper a new test signal generation approach for general analog circuits based on the variational calculus and modern control theory methods is presented. The computed transient test signals also called test stimuli are optimal with respect to the detection of a given fault set by means of a predefined merit functional representing a fault detection criterion. The test signal generation problem of finding optimal test stimuli detecting all faults form the fault set is formulated as an optimal control problem. The solution of the optimal control problem representing the test stimuli is computed using an optimization procedure. The optimization procedure is based on the necessary conditions for optimality like the maximum principle of Pontryagin and adjoint circuit equations.


Author(s):  
Abdulwahhab Essa Hamzah ◽  
Mohd Saiful Dzulkefly Zan ◽  
Mohamed Elgaud ◽  
Mahmoud Muhanad Fadhel ◽  
Sara Ali Alwash ◽  
...  

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