Performance Analysis of Full Adder Circuits Using Different Static CMOS Based Threshold Logic Gate

2021 ◽  
Author(s):  
Mili Sarkar ◽  
Gouranga Sundar Taki
Keyword(s):  
Performance Analysis ◽  
Logic Gate ◽  
Full Adder ◽  
Threshold Logic

Performance Analysis of Various FINFET Threshold Logic based Full Adder Design

2019 ◽  
Author(s):  
Mili Sarkar ◽  
Shagufta Talaat Nasir ◽  
Indrani Chakraborty ◽  
Sougata Maity ◽  
Ribhu Chakraborty ◽  
...  
Keyword(s):  
Performance Analysis ◽  
Full Adder ◽  
Threshold Logic

Low-cost BSA technique for threshold-logic gate based multiplier implementations

1997 ◽  
Vol 33 (12) ◽  
pp. 1028
Author(s):  
J.M. Quintana ◽  
M.J. Avedillo ◽  
A. Rueda
Keyword(s):  
Low Cost ◽  
Logic Gate ◽  
Threshold Logic

scholarly journals From chemical soup to computing circuit: transforming a contiguous chemical medium into a logic gate network by modulating its external conditions

2019 ◽  
Vol 16 (158) ◽  
pp. 20190190
Author(s):  
Matthew Egbert ◽  
Jean-Sébastien Gagnon ◽  
Juan Pérez-Mercader
Keyword(s):  
Logic Gate ◽  
Reaction Diffusion ◽  
Logic Gates ◽  
Full Adder ◽  
Integrated Network ◽  
Lighting Conditions ◽  
Reaction Diffusion Model ◽  
Spatially Extended ◽  
External Conditions ◽  
Spatially Extended Systems

It has been shown that it is possible to transform a well-stirred chemical medium into a logic gate simply by varying the chemistry’s external conditions (feed rates, lighting conditions, etc.). We extend this work, showing that the same method can be generalized to spatially extended systems. We vary the external conditions of a well-known chemical medium (a cubic autocatalytic reaction–diffusion model), so that different regions of the simulated chemistry are operating under particular conditions at particular times. In so doing, we are able to transform the initially uniform chemistry, not just into a single logic gate, but into a functionally integrated network of diverse logic gates that operate as a basic computational circuit known as a full-adder.

A threshold logic gate based on clocked coupled inverters

1998 ◽  
Vol 84 (4) ◽  
pp. 371-382 ◽  
Author(s):  
J. FERNANDEZ RAMOS J. A. HIDALGO LO
Keyword(s):  
Logic Gate ◽  
Threshold Logic
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