Comparing the effects of intermittent and transient hardware faults on programs

Author(s):  
Jiesheng Wei ◽  
Layali Rashid ◽  
Karthik Pattabiraman ◽  
Sathish Gopalakrishnan
Keyword(s):  
Author(s):  
Chafik Arar ◽  
Mohamed Salah Khireddine

The paper proposes a new reliable fault-tolerant scheduling algorithm for real-time embedded systems. The proposed algorithm is based on static scheduling that allows to include the dependencies and the execution cost of tasks and data dependencies in its scheduling decisions. Our scheduling algorithm is dedicated to multi-bus heterogeneous architectures with multiple processors linked by several shared buses. This scheduling algorithm is considering only one bus fault caused by hardware faults and compensated by software redundancy solutions. The proposed algorithm is based on both active and passive backup copies to minimize the scheduling length of data on buses. In the experiments, the proposed methods are evaluated in terms of data scheduling length for a set of DSP benchmarks. The experimental results show the effectiveness of our technique.


2016 ◽  
Vol 16 (2) ◽  
pp. 69-84
Author(s):  
Chafik Arar ◽  
Mohamed Salah Khireddine

Abstract The paper proposes a new reliable fault-tolerant scheduling algorithm for real-time embedded systems. The proposed scheduling algorithm takes into consideration only one bus fault in multi-bus heterogeneous architectures, caused by hardware faults and compensated by software redundancy solutions. The proposed algorithm is based on both active and passive backup copies, to minimize the scheduling length of data on buses. In the experiments, this paper evaluates the proposed methods in terms of data scheduling length for a set of DAG benchmarks. The experimental results show the effectiveness of our technique.


Author(s):  
Chafik Arar

In this article, the author uses a new variant of passive redundancy, which allows for a fictitious dual assignment by simultaneously scheduling two backup copies that overlap on the same communication bus at a given time. The proposed reliable fault tolerant greedy list scheduling algorithm is based on a superposed backup copy. This scheduling algorithm is considering up to n communication buses faults, caused by hardware faults and compensated by software redundancy solutions. it allows a reliable communication and efficient use of buses. In the experiments, the proposed methods are evaluated in terms of data scheduling length for a set of DSP benchmarks from the DSPstone.


Author(s):  
Mohamed Khalgui ◽  
Olfa Mosbahi

The chapter deals with distributed multi-agent reconfigurable embedded control systems following the component-based International Industrial Standard IEC61499 in which a Function Block (abbreviated by FB) is an event-triggered software component owning data and a control application is a distributed network of Function Blocks that have classically to satisfy functional and to meet temporal properties described in user requirements. The authors define a new reconfiguration semantic where a crucial criterion to consider is the automatic improvement of the system’s performance at run-time, in addition to its protection when hardware faults occur. To handle all possible cases in industry, the authors classify thereafter the reconfiguration scenarios into three forms before the authors define an architecture of reconfigurable multi-agent systems where a Reconfiguration Agent is affected to each device of the execution environment to apply local reconfigurations, and a Coordination Agent is proposed for any coordination between devices in order to guarantee safe and adequate distributed reconfigurations. A Communication Protocol is proposed in our research work to handle coordinations between agents by using well-defined Coordination Matrices. The authors specify both the reconfiguration agents to be modelled by nested state machines, and the Coordination Agent according to the formalism Net Condition/Event Systems (Abbreviated by NCES) which is an extension of Petri nets. To verify the whole architecture, the author check by applying the model checker SESA in each device functional and temporal properties described in the temporal logic “Computation Tree Logic”, but the authors have also to check any coordination between devices by verifying that whenever a reconfiguration is applied in a device, the Coordination Agent and other concerned devices should react as described in user requirements. The chapter’s contributions are applied to two Benchmark Production Systems available in our research laboratory.


Author(s):  
Igor Schagaev ◽  
Thomas Kaegi-Trachsel
Keyword(s):  

Author(s):  
Man-Lap Li ◽  
Pradeep Ramachandran ◽  
Ulya R. Karpuzcu ◽  
Siva Kumar Sastry Hari ◽  
Sarita V. Adve

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