Crosstalk Mitigation for Enabling DDR4 3.2Gbps External Memory Interface in FPGA with Optimized Package-Board Co-Design

Author(s):  
Lay Cuang Gan ◽  
Bowen Liu
2014 ◽  
Vol 981 ◽  
pp. 103-106
Author(s):  
Rui Xu ◽  
Zhan Peng Jiang ◽  
Chang Chun Dong ◽  
Xue Bin Lu

With the growth of the scale of SoC, function verification becomes more and more complicated. Traditional functional verification method is confronted with some challenges. This paper achieves coverage-driven, constrained-randomization and assertion verification methodology based on SystemVerilog and VMM, to build verification platform by taking example of EMI (external memory interface). As result of verification, we can monitor coverage, control the platform, optimize testbench and testcase, finish function coverage 100%. These applications can simplify complex function verification, improve the platform reuse, and meet the needs of chip verification.


Sign in / Sign up

Export Citation Format

Share Document