Open Education Teaching Unit for Low-Power Design and FPGA Image Processing

2019 ◽  
Author(s):  
Marco Winzker ◽  
Andrea Schwandt
Keyword(s):  
Image Processing ◽  
Low Power ◽  
Low Power Design ◽  
Open Education ◽  
Teaching Unit

scholarly journals A Low Power FIR Filter Design for Image Processing

VLSI Design ◽  
2001 ◽  
Vol 12 (3) ◽  
pp. 391-397 ◽  
Author(s):  
Jun Mo Jung ◽  
Jong-Wha Chong
Keyword(s):  
Image Processing ◽  
Low Power ◽  
Filter Design ◽  
Design Method ◽  
Low Power Design ◽  
Fir Filter ◽  
Correlated Data ◽  
Clock Signal ◽  
Clock Gating ◽  
Flip Flop

In this paper, a new low power design method of the FIR filter for image processing is proposed. Because the correlation between adjacent pixels is very high in image data, the clock gating technique can be a good candidate for low power strategy. However, the conventional clock gating strategy that is applied independently to every flip-flop of the filter give rise to too much additional area overhead and couldn't get a good result in the power reduction. In our method, each tap register, which is used to delay the input data in the filter, is partitioned into two sub-registers according to the correlation characteristic of its input space. For the sub-register which highly correlated data is inputted into, the dynamic power consumption is reduced by diminishing switching activity of the clock signal. We can also reduce the additional hardware overhead by propagating the clock gating control signal of the first tap register to other tap registers. To identify the efficiency of the proposed design method, we perform the experiments on some filters that are designed in VHDL. The power estimation tool says that the proposed method can reduce the power dissipation of the filter by more than 18% compared to the conventional filter design methods.

Power mad [low-power design]

2004 ◽  
Vol 18 (3) ◽  
pp. 37
Author(s):  
J. Frenkil
Keyword(s):  
Low Power ◽  
Low Power Design

scholarly journals Low Power Digital Multimedia Telecommunication Designs

VLSI Design ◽  
2001 ◽  
Vol 12 (3) ◽  
pp. 301-315 ◽  
Author(s):  
Koon-Shik Cho ◽  
Jun-Dong Cho
Keyword(s):  
Motion Estimation ◽  
Low Power ◽  
Communication Systems ◽  
Matched Filter ◽  
Optimization Technique ◽  
Low Power Design ◽  
Multimedia Systems ◽  
Wireless Multimedia ◽  
Design Constraint ◽  
Power Capability

The increasing prominence of wireless multimedia systems and the need to limit power capability in very-high density VLSI chips have led to rapid and innovative developments in low-power design. Power reduction has emerged as a significant design constraint in VLSI design. The need for wireless multimedia systems leads to much higher power consumption than traditional portable applications. This paper presents possible optimization technique to reduce the energy consumption for wireless multimedia communication systems. Four topics are presented in the wireless communication systems subsection which deal with architectures such as PN acquisition, parallel correlator, matched filter and channel coding. Two topics include the IDCT and motion estimation in multimedia application.These topics consider algorithms and architectures for low power design such as using hybrid architecture in PN acquisition, analyzing the algorithm and optimizing the sample storage in parallel correlator, using complex matched filter that analog operational circuits controlled by digital signals, adopting bit serial arithmetic for the ACS operation in viterbi decoder, using CRC to adaptively terminate the SOVA iteration in turbo decoder, using codesign in RS codec, disabling the processing elements as soon as the distortion values become great than the minimum distortion value in motion estimation, and exploiting the relative occurrence of zero-valued DCT coefficient in IDCT.

Low-Power Design Using the Si2 Common Power Format

2012 ◽  
Vol 29 (2) ◽  
pp. 62-70 ◽  
Author(s):  
Susan Carver ◽  
Anmol Mathur ◽  
Lalit Sharma ◽  
Prasad Subbarao ◽  
Steve Urish ◽  
...  
Keyword(s):  
Low Power ◽  
Low Power Design
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