Using high-resolution CCD chip and high-speed A/D converter chip, the design of the Video Communication System is given in this article, which successfully realizes the drive of the high-resolution area CCD and achieves the digital image signal. Based on the thought of SoPC’s (System on Programmable Chip) high integration, on the ALTERA company's DE2 platform, FPGA is used to achieve the driving timing of CCD, Silicon delay lines are used to properly align the pixel rate CCD clock signals with respect to one another, and the push-pull transistor circuits are designed to translate TTL level driving clock signal to the voltage levels required by the CCD. The system demonstrates some application values by analysis.
