An improved algorithm-driven methodology to optimize switched current memory cells by transistor sizing

International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04. ◽

10.1109/iceec.2004.1374569 ◽

2005 ◽

Author(s):

M. Fakhfakh ◽

M. Loulou ◽

N. Masmoudi

Keyword(s):

Memory Cells ◽

Transistor Sizing ◽

Switched Current ◽

Improved Algorithm

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Testing switched-current memory cells using DC stimuli

Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) ◽

10.1109/mmica.1999.833586 ◽

2003 ◽

Author(s):

M. Renovell ◽

F. Azais ◽

J.-C. Bodin ◽

Y. Bertrand

Keyword(s):

Memory Cells ◽

Switched Current

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Two Switched-Current Memory Cells for High-Speed Digital Communication System

Advanced Electrical and Electronics Engineering - Lecture Notes in Electrical Engineering ◽

10.1007/978-3-642-19712-3_66 ◽

2011 ◽

pp. 519-524

Author(s):

Li Cheng ◽

Ning Yang ◽

Ming Yan ◽

Xiaodi Zhou

Keyword(s):

Communication System ◽

Digital Communication ◽

Memory Cells ◽

Switched Current ◽

Digital Communication System

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Optimizing performances of switched current memory cells through a heuristic

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-006-9009-5 ◽

2006 ◽

Vol 50 (2) ◽

pp. 115-126 ◽

Author(s):

Mourad Fakhfakh ◽

Mourad Loulou ◽

Nouri Masmoudi

Keyword(s):

Memory Cells ◽

Switched Current

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High-Performance Design Approach to Algorithmic A/D Converter Using new Types of Switched-Current Memory Cells

IFAC Proceedings Volumes ◽

10.1016/s1474-6670(17)33744-8 ◽

2003 ◽

Vol 36 (1) ◽

pp. 219-222

Author(s):

Ondřej Šubrt ◽

Petr Drechsler

Keyword(s):

High Performance ◽

Design Approach ◽

Memory Cells ◽

Switched Current ◽

High Performance Design

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Error neutralisation in switched current memory cells

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349) ◽

10.1109/iscas.1999.780770 ◽

2003 ◽

Author(s):

J.B. Hughes ◽

K.W. Moulding

Keyword(s):

Memory Cells ◽

Switched Current

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Audio ΣΔ-modulator implementation using class AB compact switched current memory cells

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 ◽

10.1109/iscas.1994.409444 ◽

2002 ◽

Author(s):

H. Traff ◽

S. Erikson

Keyword(s):

Memory Cells ◽

Class Ab ◽

Switched Current ◽

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Design of a measurement and interface integrated circuit for characterization of switched current memory cells

Proceedings Eleventh International Conference on VLSI Design ◽

10.1109/icvd.1998.646610 ◽

2002 ◽

Author(s):

A.M. Pereira ◽

T.C. Pimenta ◽

R.L. Moreno ◽

E. Charry R ◽

A.M. Jorge

Keyword(s):

Integrated Circuit ◽

Memory Cells ◽

Switched Current

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High performance voltage delay lines using switched-current memory cells

Electronics Letters ◽

10.1049/el:19920141 ◽

1992 ◽

Vol 28 (3) ◽

pp. 228 ◽

Author(s):

N. Tan ◽

S. Eriksson

Keyword(s):

High Performance ◽

Memory Cells ◽

Delay Lines ◽

Switched Current

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Harmonic distortion in switched-current audio memory cells

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ◽

10.1109/82.754865 ◽

1999 ◽

Vol 46 (3) ◽

pp. 326-334 ◽

Author(s):

J.M. Martins ◽

V.F. Dias

Keyword(s):

Harmonic Distortion ◽

Memory Cells ◽

Switched Current

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Analysis and design of low-voltage CMOS current memory cells using switched current techniques

Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442) ◽

10.1109/icm.2003.238305 ◽

2003 ◽

Author(s):

Y. Aki ◽

M. El-Sayed ◽

A.K. Aboul-Seoud

Keyword(s):

Low Voltage ◽

Memory Cells ◽

Analysis And Design ◽

Switched Current

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