Memory Technology plays a vital role in fast
searching applications. Content Addressable Memory (CAM) is a
special type of memory used for search operation. CAM provides
access to the stored data by its content instead of the address.
Advanced version of CAM is known as Ternary CAM (TCAM)
which is a memory that can also store don’t care bit. TCAM is
most relevant in routers in networking applications. Review of
TCAM design techniques at different aspects are carried out, and
obtained that an Energy Efficient TCAM (EE-TCAM) is the one
which is having less power consumption. Compared with other
SRAM-based TCAM designs, EE-TCAM use up reduced energy
as it selectively activates only one row of SRAM at a time for
search operation instead of activating the whole SRAM memory
as in the other architectures. Partitioning of the TCAM table,
designing of a pre-classifier and memory mapping are done prior
to the work. This paper focuses on designing an EE-TCAM using
Verilog HDL on Zybo7000 platform using Vivado design suite.
Functional analysis of a 6*6 EE-TCAM is performed and power,
delay and resource utilization are obtained. From the obtained
results it is clear that EE-TCAM is having very less power and
delay.
Ternary Content Addressable Memory
