Abstract
This paper presents a systematic comparison of the relationship between transmission line characteristic impedance and Q-factor of CPW, slow-wave CPW, microstrip, and slow-wave microstrip in the same CMOS back-end-of-line process. It is found that the characteristic impedance for optimal Q-factor depends on the ground-to-ground spacing of the slow-wave transmission line. Although the media are shown to be similar from a mode of propagation point of view, the 60-GHz optimal Q-factor for slow-wave transmission lines is achieved when the characteristic impedance is ≈23 Ω for slow-wave CPWs and ≈43 Ω for slow-wave microstrip lines, with Q-factor increasing for wider ground plane gaps. Moreover, it is shown that slow-wave CPW is found to have a 12% higher optimal Q-factor than slow-wave microstrip for a similar chip area. The data presented here may be used in selecting Z0 values for S-MS and S-CPW passives in CMOS that maximize transmission line Q-factors.
Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line