Transmission lines characteristic impedance versus Q-factor in CMOS technology

2021 ◽  
pp. 1-6
Author(s):  
Johannes J.P. Venter ◽  
Anne-Laure Franc ◽  
Tinus Stander ◽  
Philippe Ferrari
Keyword(s):  
Transmission Line ◽  
Slow Wave ◽  
Transmission Lines ◽  
Characteristic Impedance ◽  
Ground Plane ◽  
Cmos Technology ◽  
Wave Transmission ◽  
60 Ghz ◽  
Q Factor ◽  
Chip Area

Abstract This paper presents a systematic comparison of the relationship between transmission line characteristic impedance and Q-factor of CPW, slow-wave CPW, microstrip, and slow-wave microstrip in the same CMOS back-end-of-line process. It is found that the characteristic impedance for optimal Q-factor depends on the ground-to-ground spacing of the slow-wave transmission line. Although the media are shown to be similar from a mode of propagation point of view, the 60-GHz optimal Q-factor for slow-wave transmission lines is achieved when the characteristic impedance is ≈23 Ω for slow-wave CPWs and ≈43 Ω for slow-wave microstrip lines, with Q-factor increasing for wider ground plane gaps. Moreover, it is shown that slow-wave CPW is found to have a 12% higher optimal Q-factor than slow-wave microstrip for a similar chip area. The data presented here may be used in selecting Z0 values for S-MS and S-CPW passives in CMOS that maximize transmission line Q-factors.

Enhanced performance of a 60-GHz power amplifier by using slow-wave transmission lines in 40 nm CMOS technology

2011 ◽  
Vol 4 (1) ◽  
pp. 93-100 ◽  
Author(s):  
Xiao-Lan Tang ◽  
Emmanuel Pistono ◽  
Philippe Ferrari ◽  
Jean-Michel Fournier
Keyword(s):  
Millimeter Wave ◽  
Power Amplifier ◽  
Slow Wave ◽  
Transmission Lines ◽  
Power Amplifiers ◽  
Cmos Technology ◽  
Wave Transmission ◽  
60 Ghz ◽  
Microstrip Lines ◽  
Class A

This paper shows the contribution of slow-wave coplanar waveguides on the performance of power amplifiers operating at millimeter-wave frequencies in CMOS-integrated technologies. These transmission lines present a quality factor Q two to three times higher than that of the conventional microstrip lines at the same characteristic impedance. To demonstrate the contribution of the slow-wave transmission lines on integrated millimeter-wave amplifiers performance, two Class-A single-stage power amplifiers (PA) operating at 60 GHz were designed in standard 40 nm CMOS technology. One of the power amplifiers incorporates only the microstrip lines, whereas slow-wave coplanar transmission lines are considered in the other one. Both amplifiers are biased in Class-A operation, drawing, respectively, 22 and 23 mA from 1.2 V supply. Compared to the power amplifier using conventional microstrip transmission lines, the one implemented with slow-wave transmission lines shows improved performances in terms of gain (5.6 dB against 3.3 dB), 1 dB output compression point (OCP1dB: 7 dBm against 5 dBm), saturated output power (Psat: >10 and 8 dBm, respectively), power-added efficiency (PAE: 16% instead of 6%), and die area without pads (Sdie: 0.059 mm2 against 0.069 mm2).

60 GHz-Band Low-Noise Amplifier

2017 ◽  
Vol 26 (05) ◽  
pp. 1750075 ◽  
Author(s):  
Najam Muhammad Amin ◽  
Lianfeng Shen ◽  
Zhi-Gong Wang ◽  
Muhammad Ovais Akhter ◽  
Muhammad Tariq Afridi
Keyword(s):  
Transmission Line ◽  
Quality Factor ◽  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Constant Current ◽  
60 Ghz ◽  
Frequency Range ◽  
Constant Current Density ◽  
Chip Area

This paper presents the design of a 60[Formula: see text]GHz-band LNA intended for the 63.72–65.88[Formula: see text]GHz frequency range (channel-4 of the 60[Formula: see text]GHz band). The LNA is designed in a 65-nm CMOS technology and the design methodology is based on a constant-current-density biasing scheme. Prior to designing the LNA, a detailed investigation into the transistor and passives performances at millimeter-wave (MMW) frequencies is carried out. It is shown that biasing the transistors for an optimum noise figure performance does not degrade their power gain significantly. Furthermore, three potential inductive transmission line candidates, based on coplanar waveguide (CPW) and microstrip line (MSL) structures, have been considered to realize the MMW interconnects. Electromagnetic (EM) simulations have been performed to design and compare the performances of these inductive lines. It is shown that the inductive quality factor of a CPW-based inductive transmission line ([Formula: see text] is more than 3.4 times higher than its MSL counterpart @ 65[Formula: see text]GHz. A CPW structure, with an optimized ground-equalizing metal strip density to achieve the highest inductive quality factor, is therefore a preferred choice for the design of MMW interconnects, compared to an MSL. The LNA achieves a measured forward gain of [Formula: see text][Formula: see text]dB with good input and output impedance matching of better than [Formula: see text][Formula: see text]dB in the desired frequency range. Covering a chip area of 1256[Formula: see text][Formula: see text]m[Formula: see text]m including the pads, the LNA dissipates a power of only 16.2[Formula: see text]mW.

60 GHz Amplifier Employing Slow-wave Transmission Lines in 65-nm CMOS

2008 NORCHIP ◽  
2008 ◽  
Author(s):  
Dan Sandstrom ◽  
Mikko Varonen ◽  
Mikko Karkkainen ◽  
Kari Halonen
Keyword(s):  
Slow Wave ◽  
Transmission Lines ◽  
Wave Transmission ◽  
60 Ghz

Liquid Crystal Polymer (LCP) for Characterization of Millimer-Wave Transmission Lines and Bandpass Filters

2009 ◽  
Author(s):  
H. J. Lu ◽  
Y. X. Guo ◽  
K. Faeyz ◽  
C. K. Cheng ◽  
J. Wei
Keyword(s):  
Liquid Crystal ◽  
Millimeter Wave ◽  
Transmission Lines ◽  
Microstrip Line ◽  
Characteristic Impedance ◽  
Wave Transmission ◽  
60 Ghz ◽  
Crystal Polymer ◽  
Measurement Results

In this paper, a multi-layer LCP substrate fabrication process was described and millimeter wave transmission lines and filters were designed and fabricated on the LCP substrate. Various transitions from a CPW to a microstrip line with their characteristic impedance being 50 ohms were investigated. The characteristics of the wirebonding assembly for connecting two transmission lines was also examined. The measurement results show that an insertion loss of 1.3 dB at 60 GHz can be achieved for the two-wire bonding trasmisssion line including two transitions from a CPW to a microstrip line.

An ultra-slow-wave transmission line on CMOS technology

2017 ◽  
Vol 59 (3) ◽  
pp. 604-606 ◽  
Author(s):  
Bayaner Arigong ◽  
Han Ren ◽  
Jun Ding ◽  
Hoon-Ju Chung ◽  
Sungyong Jung ◽  
...  
Keyword(s):  
Transmission Line ◽  
Slow Wave ◽  
Cmos Technology ◽  
Wave Transmission

60 GHz amplifier employing slow-wave transmission lines in 65-nm CMOS

2009 ◽  
Vol 64 (3) ◽  
pp. 223-231 ◽  
Author(s):  
Dan Sandström ◽  
Mikko Varonen ◽  
Mikko Kärkkäinen ◽  
Kari Halonen
Keyword(s):  
Slow Wave ◽  
Transmission Lines ◽  
Wave Transmission ◽  
60 Ghz

scholarly journals A 60 GHz fully differential LNA in 90 nm CMOS technology

2013 ◽  
Vol 6 (2) ◽  
pp. 109-113 ◽  
Author(s):  
Andrea Malignaggi ◽  
Amin Hamidian ◽  
Georg Boeck
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Transmission Lines ◽  
Noise Figure ◽  
Design Procedure ◽  
Cmos Technology ◽  
High Gain ◽  
Low Noise ◽  
60 Ghz ◽  
Fully Differential

The present paper presents a fully differential 60 GHz four stages low-noise amplifier for wireless applications. The amplifier has been optimized for low-noise, high-gain, and low-power consumption, and implemented in a 90 nm low-power CMOS technology. Matching and common-mode rejection networks have been realized using shielded coplanar transmission lines. The amplifier achieves a peak small-signal gain of 21.3 dB and an average noise figure of 5.4 dB along with power consumption of 30 mW and occupying only 0.38 mm2pads included. The detailed design procedure and the achieved measurement results are presented in this work.

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