Mostly-digital design of sinusoidal signal generators for mixed-signal BIST applications using harmonic cancellation

2016 ◽  
Author(s):  
Hani Malloug ◽  
Manuel J. Barragan ◽  
Salvador Mir ◽  
Emmanuel Simeu ◽  
Herve Le-Gall
Keyword(s):  
Digital Design ◽  
Sinusoidal Signal ◽  
Mixed Signal ◽  
Harmonic Cancellation

Rapid prototyping of algorithmic A/D converters based on FPAA devices

2013 ◽  
Vol 61 (3) ◽  
pp. 691-696 ◽  
Author(s):  
R. Suszynski ◽  
K. Wawryn
Keyword(s):  
Rapid Prototyping ◽  
Sinusoidal Signal ◽  
Digital Converter ◽  
Mixed Signal ◽  
Analog Digital Converter ◽  
Signal Systems ◽  
Programmable Analog ◽  
Field Programmable ◽  
Field Programmable Analog Array

Abstract A rapid prototyping method for designing mixed signal systems has been presented in the paper. The method is based on implementation of the field programmable analog array (FPAA) to configure and reconfigure mixed signal systems. A serial algorithmic analog digital converter has been used as an example. Three converter architectures have been selected and implemented FPAA device. To verify and illustrate converters operation and prototyping capabilities, implemented converters have been excited by a sinusoidal signal. Analog sinusoidal excitations, digital responses and sinusoidal waveforms after reconstruction are presented.

A 65-nm CMOS $I/Q$ RF Power DAC With 24- to 42-dB Third-Harmonic Cancellation and Up to 18-dB Mixed-Signal Filtering

2018 ◽  
Vol 53 (4) ◽  
pp. 1127-1138 ◽  
Author(s):  
Bonjern Yang ◽  
Eric Y. Chang ◽  
Ali M. Niknejad ◽  
Borivoje Nikolic ◽  
Elad Alon
Keyword(s):  
Rf Power ◽  
Signal Filtering ◽  
Mixed Signal ◽  
Third Harmonic ◽  
Harmonic Cancellation

A BIST Structure for ADC in Mixed-Signal SOC

2013 ◽  
Vol 278-280 ◽  
pp. 950-953
Author(s):  
Shi Rong Yin ◽  
Chao Tao Liu
Keyword(s):  
Sinusoidal Signal ◽  
Computational Resource ◽  
Sigma Delta Modulation ◽  
Sigma Delta ◽  
Mixed Signal ◽  
Adc Test ◽  
Delta Modulation

A BIST structure for ADC test in Mixed-Signal SOC to characterize both the dynamic and static parameters was presented. A Sigma-Delta modulation based sinewave generator was built on the chip. The frequency, amplitude and phase of the sinusoidal signal can be adjusted through proper selecting generator parameters which are stored in ADC WBR. The response analyzer was built up from the memory and computational resource in the SOC.

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