A monolithic microring transmitter in 90 nm SOI CMOS technology

Author(s):  
J. C. Rosenberg ◽  
W. M. J. Green ◽  
J. Proesel ◽  
S. Assefa ◽  
D. M. Gill ◽  
...  
Keyword(s):  
Author(s):  
John Bulzacchelli ◽  
Troy Beukema ◽  
Daniel Storaska ◽  
Ping-Hsuan Hsieh ◽  
Sergey Rylov ◽  
...  

2014 ◽  
Vol 23 (3) ◽  
pp. 636-650 ◽  
Author(s):  
Radhika Marathe ◽  
Bichoy Bahr ◽  
Wentao Wang ◽  
Zohaib Mahmood ◽  
Luca Daniel ◽  
...  
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Author(s):  
Florent Torres ◽  
Eric Kerhervé ◽  
Andreia Cathelin ◽  
Magali De Matos

Abstract This paper presents a 31 GHz integrated power amplifier (PA) in 28 nm Fully Depleted Silicon-On-Insulator Complementary Metal Oxide Semiconductor (FD-SOI CMOS) technology and targeting SoC implementation for 5 G applications. Fine-grain wide range power control with more than 10 dB tuning range is enabled by body biasing feature while the design improves voltage standing wave ratio (VSWR) robustness, stability and reverse isolation by using optimized 90° hybrid couplers and capacitive neutralization on both stages. Maximum power gain of 32.6 dB, PAEmax of 25.5% and Psat of 17.9 dBm are measured while robustness to industrial temperature range and process spread is demonstrated. Temperature-induced performance variation compensation, as well as amplitude-to-phase modulation (AM-PM) optimization regarding output power back-off, are achieved through body-bias node. This PA exhibits an International Technology Roadmap for Semiconductors figure of merit (ITRS FOM) of 26 925, the highest reported around 30 GHz to authors' knowledge.


Author(s):  
Haidong Sun ◽  
Sho Hoshino ◽  
Hirokazu Yoshizawa ◽  
Fumiyasu Utsunomiya ◽  
Minoru Sudo
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