Development of a serial link transmitter for monolithic active pixel sensors

In this paper, a 5-Gbps serial link transmitter has been designed for monolithic active pixel sensor. The serial link is designed in a commercial 130-nm CMOS technology with a power supply of 1.2 V. The transmitter consists of a 16b/20b encoder, a three-stage 20:1 serializer core, the CML driver with pre-emphasis function, and a high-speed receiver to deal with the external clock. The root mean square jitter of this serial link transmitter is 2.2 ps, indicating a bit error rate of 1 × 10−14. This paper will discuss the design and performance of this serial link transmitter.

Unified Parameterization and Calibration of Serial, Parallel, and Hybrid Manipulators

In this work, we present methods allowing parallel, hybrid, and serial manipulators to be analyzed, calibrated, and controlled with the same analytical tools. We introduce a general approach to describe any robotic manipulator using established serial-link representations. We use this framework to generate analytical kinematic and calibration Jacobians for general manipulator constructions using null space constraints and extend the methods to hybrid manipulator types with complex geometry. We leverage the analytical Jacobians to develop detailed expressions for post-calibration pose uncertainties that are applied to describe the relationship between data set size and post-calibration uncertainty. We demonstrate the calibration of a hybrid manipulator assembled from high precision calibrated industrial components resulting in 91.1 μm RMS position error and 71.2 μrad RMS rotation error, representing a 46.7% reduction compared to the baseline calibration of assembly offsets.

An 8–12.5-GHz LC PLL with Dual VCO and Noise-Reduced LDO Regulator for Multilane Multiprotocol SerDes in 28-nm CMOS Technology

This study presents an inductance capacitance (LC) phase-locked loop (PLL) with a dual voltage-controlled oscillator (VCO) and a noise-reduced low-dropout (LDO) regulator, which was used in four-lane multiprotocol serial link applications. The dual VCO architecture can increase the total frequency-tuning range to ensure that the LC PLL achieves multiprotocol serial link coverage from 8 to 12.5 Gbps. Two switch capacitor array-based LC VCOs have a large frequency-tuning range and small VCO gain. The noise-reduced LDO regulator provides a very low-noise power supply to the VCO. The active area occupied by the proposed LC PLL in UMC 28-nm 1P10M complementary metal–oxide–semiconductor (CMOS) technology is 0.25 mm2. The phase noise of the VCO at 1 MHz is −108.1 dBc/Hz. The power consumption of the LC PLL with a 1.8-V supply is 16.5 mW.

Enhancement of Force Control Performance of Macro-Micro System Based Polishing Robot With Gravity Compensation

In a fine mold manufacturing process, the polishing process plays an important role in enhancing the surface quality and is performed manually by skilled workers. However, there are many problems such as decrease in skilled workers, health hazards due to scattering of abrasives, and difference in surface quality due to difference in the proficiency. Hence, there is a strong demand for automation of the polishing process at present. In this research, a robot polishing system that applies macro-micro mechanism is proposed. The functional polishing module of the end effector is developed and attached to the hand of the serial link robot. Tool path and posture are controlled in a serial link robot as a macro mechanism, and polishing force and tool rotation speed are controlled in the developed polishing module as micro mechanism. This mechanism ideally controls position, force, and rotation speed at the same time. An interlocking control system for position and force has already been constructed. In this paper, we constructed gravity compensation and evaluated the force control performance of the constructed system. Through the evaluation, the followability of the estimated reaction force to the command force and the validity of the actual force behavior measured by the force sensor were evaluated.

FST-Convoy: A Leader Tracking Control of Vehicles Connected by Shape Sensor FST

This paper describes FST-Convoy, a leader tracking control system for vehicles using the shape sensor flexible sensor tube (FST). Among many methods of autonomous driving, follow-driving is one of them. Some of these have been put into practical use in a limited environment. Unfortunately, there are situations in which such sensors do not work well. One of these is underground. In the underground, GNSS signals do not reach vehicles, so they cannot obtain their positions. Therefore, we propose a new way to achieve follow-driving in such environments. We used the shape sensor, FST. The FST is a shape sensor with a serial link structure and many joints. It can measure its shape by solving its kinematics and determine the relative position of the start link to the end link. Therefore, we can measure the relative positions of vehicles that connected a leader and a follower using FST. We call this system FST-Convoy. We developed and verified the system using a platooning-driving experiment.

A 10 Gbps 4-PAM CMOS serial link transmitter with pre-emphasis

This thesis presents the design of 10 Gbps 4-PAM CMOS serial link transmitters. A new area-power efficient fully differential CMOS current-mode serial link transmitter with a proposed 2/4-PAM signaling configuration and a new pre-emphasis scheme is presented. The pre-emphasis inthe analog domain and the use of de-emphasis approach decres pre-emphasis power and chip area. The high-speed operation of the transmitter is achieved from the small voltage swing of critical nodes of the transmitter, shunt peaking with active inductors, multiplexing-at-input approach, the distributed multiplexing nodes, and the low characteristic impedance of the channels. The fully differential and bidirectional current-mode signaling minimizes the noise injected to the power and ground rails and the electromagnetic interference exerted from the channels to neighboring devices. A PLL containing a proposed five-stage VCO is implemented to generate multi-phase on -chip clocks. The proposed VCO minimized the phase noise by keeping a constant rising and falling time. Simulation results demonstrate that the current received at the far end of a 10 cm FR-4 microstriop has a 4-PAM current eye width of 185 ps and eye hight of 1.21 mA. It consumes 57.6 mW power with differnetial delay block, or 19.2 mW power with inverter buffer chain. The total transistor area of the transmitter is 26.845 ....excluding the delay block.