Miller Compensation: Optimization with Current Buffer/Amplifier

Author(s):  
Walter Aloisi ◽  
Giuseppe Di Cataldo ◽  
Gaetano Palumbo ◽  
Salvatore Pennisi
2011 ◽  
Vol 20 (07) ◽  
pp. 1277-1286 ◽  
Author(s):  
MERIH YILDIZ ◽  
SHAHRAM MINAEI ◽  
EMRE ARSLAN

This work presents a high-slew rate rail-to-rail buffer amplifier, which can be used for flat panel displays. The proposed buffer amplifier is composed of two transconductance amplifiers, two current comparators and a push-pull output stage. Phase compensation technique is also used to improve the phase margin value of the proposed buffer amplifier for different load capacitances. Post-layout simulations of the proposed buffer amplifier are performed using 0.35 μm AMS CMOS process parameters and 3.3 V power supply. The circuit is tested under a 600 pF capacitive load. An average settling time of 0.85 μs under a full voltage swing is obtained, while only 3 μA quiescent current is drawn from the power supply. Monte Carlo analysis is also added to show the process variation effects on the circuit.


1993 ◽  
Vol 28 (12) ◽  
pp. 1350-1353 ◽  
Author(s):  
Joongsik Kih ◽  
Byungsoo Chang ◽  
Deog-Kyoon Jeong

Integration ◽  
2021 ◽  
Vol 77 ◽  
pp. 1-12
Author(s):  
Jayachandran Remya ◽  
P.C. Subramaniam ◽  
K.J. Dhanaraj

1987 ◽  
Vol 22 (3) ◽  
pp. 330-334 ◽  
Author(s):  
J.A. Fisher ◽  
R. Koch
Keyword(s):  

Sign in / Sign up

Export Citation Format

Share Document