Gallium arsenide buffer amplifier

The circuitry of a buffer amplifier (BA) implemented on gallium arsenide n-channel field-effect transistors with a control p-n junction and gallium arsenide bipolar p-n-p transistors is considered. The results of computer simulation of the amplitude characteristics of the BA in the LTspice environment are presented. The proposed circuit solutions are recommended for use in RC filters of the Sallen Key family

Gallium arsenide buffer amplifier

The circuitry of a buffer amplifier (BA) implemented on gallium arsenide n-channel field-effect transistors with a control p-n junction and gallium arsenide bipolar p-n-p transistors is considered. The results of computer simulation of the amplitude characteristics of the BA in the LTspice environment are presented. The proposed circuit solutions are recommended for use in RC filters of the Sallen Key family

High-Speed Column Driver IC Having Buffer Amplifier with Embedded Isolation Switch and Compact Adaptive Biasing for Flat-Panel Displays

A high-speed column driver IC with an area-efficient high-slew-rate buffer amplifier is proposed for use in a large-sized, high-resolution TFT-LCD panel application. In the proposed architecture, explicit isolation switches have been embedded into the buffer amplifier resulting in a fast settling response. The amplifier also has a structure that adjusts the tail current of the input stage using a very compact adaptive biasing. The proposed column driver IC, having the proposed buffer amplifier for driving a 55-inch 4K ultra-high-definition (UHD) TV panel, was fabricated in a 0.18-μm 1.8-V low-voltage, 1.2-μm 9-V medium-voltage, and 1.6-μm 18-V high-voltage CMOS process. The performance evaluation results indicated that 90% and 99.9% falling settling times were improved from 1.947 µs to 0.710 µs (63.5% improvement) and 4.131 µs to 2.406 µs (41.7% improvement), respectively. They also indicated that the layout size of the proposed buffer amplifier was reduced from 5580 μm2 to 4402 μm2 (21.1% reduction).

Automated design of a linear microwave monolithic distributed amplifier

Microwave integrated circuit (IC) design tends to become more efficient and less expensive which leads to emerging the circuit topology and layout synthesis software. In the paper we present a technique and an algorithm for microwave distributed amplifier (DA) automated synthesis based on requirements to linear characteristics. The technique feature is the using of active and passive element’s models for a chosen IC process. This allow the technique to generate circuit topology which can be manufactured using a given IC process. The proposed DA automated design technique work was demonstrated with preamplifier stage design for 20–30 GHz buffer amplifier MMIC based on the 0.25um GaAs pHEMT process of Svetlana-Rost foundry in Saint-Petersburg.