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Low power LDPC decoder with efficient stopping scheme for undecodable blocks
2011 IEEE International Symposium of Circuits and Systems (ISCAS)
◽
10.1109/iscas.2011.5937929
◽
2011
◽
Cited By ~ 6
Author(s):
Tinoosh Mohsenin
◽
Houshmand Shirani-mehr
◽
Bevan Baas
Keyword(s):
Low Power
◽
Ldpc Decoder
Download Full-text
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References
A Great Adaptive SNR Assumed Low Power LDPC Decoder
Advanced Techniques for IoT Applications - Lecture Notes in Networks and Systems
◽
10.1007/978-981-16-4435-1_43
◽
2021
◽
pp. 443-451
Author(s):
C. Ashok Kumar
◽
K. Haribabu
Keyword(s):
Low Power
◽
Ldpc Decoder
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Design of Low-Power Non-Binary LDPC Decoder Exploiting DRAM Refresh Rate Over-Scaling
IEEE Transactions on Circuits & Systems II Express Briefs
◽
10.1109/tcsii.2018.2883713
◽
2019
◽
Vol 66
(8)
◽
pp. 1391-1395
◽
Cited By ~ 1
Author(s):
Wenjie Huang
◽
Weiguo Tang
◽
Junlin Chen
◽
Lei Wang
Keyword(s):
Low Power
◽
Refresh Rate
◽
Ldpc Decoder
◽
Dram Refresh
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A Low-Power LDPC Decoder for Multimedia Wireless Sensor Networks
IEICE Transactions on Communications
◽
10.1587/transcom.e96.b.939
◽
2013
◽
Vol E96.B
(4)
◽
pp. 939-947
◽
Cited By ~ 1
Author(s):
Meng XU
◽
Xincun JI
◽
Jianhui WU
◽
Meng ZHANG
Keyword(s):
Wireless Sensor Networks
◽
Sensor Networks
◽
Low Power
◽
Wireless Sensor
◽
Ldpc Decoder
Download Full-text
An FPGA design of low power LDPC decoder for high-speed wireless LAN
2010 IEEE 12th International Conference on Communication Technology
◽
10.1109/icct.2010.5688980
◽
2010
◽
Author(s):
Min Hyuk Kim
◽
Tae Doo Park
◽
Chul Seong Kim
◽
Ji Won Jung
Keyword(s):
Low Power
◽
Wireless Lan
◽
High Speed
◽
Fpga Design
◽
Ldpc Decoder
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A High-Throughput Low-Power Soft Bit-Flipping LDPC Decoder in 28 nm FD-SOI
ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)
◽
10.1109/esscirc.2018.8494261
◽
2018
◽
Cited By ~ 3
Author(s):
Kevin Cushon
◽
Per Larsson-Edefors
◽
Peter Andrekson
Keyword(s):
Low Power
◽
High Throughput
◽
Ldpc Decoder
◽
28 Nm
Download Full-text
Ultra low power QC-LDPC decoder with high parallelism
2011 IEEE International SOC Conference
◽
10.1109/socc.2011.6085136
◽
2011
◽
Cited By ~ 4
Author(s):
Ying Cui
◽
Xiao Peng
◽
Zhixiang Chen
◽
Xiongxin Zhao
◽
Yichao Lu
◽
...
Keyword(s):
Low Power
◽
Ultra Low Power
◽
Ldpc Decoder
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Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels
2009 22nd International Conference on VLSI Design
◽
10.1109/vlsi.design.2009.68
◽
2009
◽
Cited By ~ 12
Author(s):
Weihuang Wang
◽
Gwan Choi
◽
Kiran K. Gunnam
Keyword(s):
Low Power
◽
Vlsi Design
◽
Ldpc Decoder
◽
Low Power Vlsi Design
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Low-power design of variable block-size LDPC decoder using nanometer technology
Proceedings of 2010 IEEE International Symposium on Circuits and Systems
◽
10.1109/iscas.2010.5537590
◽
2010
◽
Cited By ~ 1
Author(s):
Chih-Hung Lin
◽
Alex Chien-Lin Huang
◽
Robert Chen-Hao Chang
◽
Kuang-Hao Lin
Keyword(s):
Low Power
◽
Block Size
◽
Low Power Design
◽
Ldpc Decoder
◽
Variable Block
◽
Nanometer Technology
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Scalable and low power LDPC decoder design using high level algorithmic synthesis
2009 IEEE International SOC Conference (SOCC)
◽
10.1109/soccon.2009.5398044
◽
2009
◽
Cited By ~ 13
Author(s):
Yang Sun
◽
Joseph R. Cavallaro
◽
Tai Ly
Keyword(s):
Low Power
◽
Ldpc Decoder
◽
Decoder Design
◽
High Level
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High-Throughput Low-Power LDPC Decoder and Code Design
2011 IEEE Global Telecommunications Conference - GLOBECOM 2011
◽
10.1109/glocom.2011.6134485
◽
2011
◽
Cited By ~ 1
Author(s):
T. Henige
◽
S. Abu-Surra
◽
E. Pisek
Keyword(s):
Low Power
◽
High Throughput
◽
Code Design
◽
Ldpc Decoder
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