PurposeCharge pump phase locked loops (CPPLLs) are nonlinear systems as a result of the nonlinear behavior of voltage-controlled oscillators (VCO). This paper aims to specify jitter generation of voltage controlled oscillator phase noise in CPPLLs, by considering approximated practical model for VCO.
Design/methodology/approachCPPLL, in practice, shows nonlinear behavior, and usually in LC-VCOs, it follows second-degree polynomial function behavior. Therefore, the nonlinear differential equation of the system is obtained which shows the CPPLLs are a nonlinear system with memory, and that Volterra series expansion is useful for such systems.
FindingsIn this paper, by considering approximated practical model for VCO, jitter generation of voltage controlled oscillator phase noise in CPPLLs is specified. Behavioral simulation is used to validate the analytical results. The results show a suitable agreement between analytical equations and simulation results.
Originality/valueThe proposed method in this paper has two advantages over the conventional design and analysis methods. First, in contrast to an ideal CPPLL, in which the characteristic of the VCO’s output frequency based on the control voltage is linear, in the present paper, a nonlinear behavior was considered for this characteristic in accordance with the real situations. Besides, regarding the simulations in this paper, a behavior similar to the second-degree polynomial was considered, which caused the dependence of the produced jitter’s characteristic corner frequency on the jitter’s amplitude. Second, some new nonlinear differential equations were proposed for the system, which ensured the calculation of the produced jitter of the VCO phase noise in CPPLLs. The presented method is general enough to be used for designing the CPPLL.
PLL DESIGN AND INVESTIGATION IN CMOS
