Asynchronous interleaved scan architecture for on-line built-in self-test of null convention logic

2016 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2016.7527348 ◽

2016 ◽

Author(s):

Nastaran Nemati ◽

Mark C. Reed ◽

Karl Fant ◽

Paul Beckett

Keyword(s):

Null Convention Logic ◽

On Line ◽

Self Test ◽

Built In Self Test

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On-line RF built-in self-test using noise injection and transmitter signal modulation by phase shifter

2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) ◽

10.23919/date.2018.8342157 ◽

2018 ◽

Author(s):

Jan Schat

Keyword(s):

Phase Shifter ◽

Signal Modulation ◽

Noise Injection ◽

On Line ◽

Self Test ◽

Built In Self Test

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A Transient Fault Tolerant Test Pattern Generator for On-line Built-in Self-Test

2013 22nd Asian Test Symposium ◽

10.1109/ats.2013.24 ◽

2013 ◽

Author(s):

Yuki Fukazawa ◽

Tsuyoshi Iwagaki ◽

Hideyuki Ichihara ◽

Tomoo Inoue

Keyword(s):

Test Pattern ◽

Fault Tolerant ◽

Pattern Generator ◽

Transient Fault ◽

On Line ◽

Self Test ◽

Built In Self Test

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Efficient techniques for reducing error latency in on-line periodic built-in self-test

IEEE Instrumentation & Measurement Magazine ◽

10.1109/mim.2010.5521863 ◽

2010 ◽

Vol 13 (4) ◽

pp. 28-32 ◽

Author(s):

Hussain Al-Asaad

Keyword(s):

On Line ◽

Self Test ◽

Built In Self Test ◽

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On-line built-in self-test for operational faults

2000 IEEE Autotestcon Proceedings. IEEE Systems Readiness Technology Conference. Future Sustainment for Military Aerospace (Cat. No.00CH37057) ◽

10.1109/autest.2000.885585 ◽

2002 ◽

Author(s):

H. Al-Asaad ◽

M. Shringi

Keyword(s):

On Line ◽

Self Test ◽

Built In Self Test

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Optimal on-line built-in self-test structure for system-reliability improvement

2011 IEEE Congress of Evolutionary Computation (CEC) ◽

10.1109/cec.2011.5949622 ◽

2011 ◽

Author(s):

Gregor Papa ◽

Tomasz Garbolino

Keyword(s):

System Reliability ◽

Test Structure ◽

Reliability Improvement ◽

On Line ◽

Self Test ◽

Built In Self Test

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Utilization of on-line (concurrent) checkers during built-in self-test and vice versa

IEEE Transactions on Computers ◽

10.1109/12.481487 ◽

1996 ◽

Vol 45 (1) ◽

pp. 63-73 ◽

Author(s):

S.K. Gupta ◽

D.K. Pradhan

Keyword(s):

On Line ◽

Self Test ◽

Built In Self Test

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Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits

2020 IEEE 38th VLSI Test Symposium (VTS) ◽

10.1109/vts48691.2020.9107627 ◽

2020 ◽

Author(s):

Brett Sparkman ◽

Scott C. Smith ◽

Jia Di

Keyword(s):

Asynchronous Circuits ◽

Null Convention Logic ◽

Self Test ◽

Built In Self Test

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Test the S27 Benchmark Circuit by Using Built In Self Test and Test Pattern Generation

International Journal of Advanced Research in Electrical Electronics and Instrumentation Engineering ◽

10.15662/ijareeie.2014.0308083 ◽

2014 ◽

Vol 03 (08) ◽

pp. 11487-11495

Author(s):

S. Nagaraju ◽

Ch.N.L. Sujatha ◽

J.S.S. Ramaraju

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Benchmark Circuit ◽

Self Test ◽

Built In Self Test

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Memory Implementation in a System on Chip with Built-in Self-Test and Recovery Tools

Proceedings of Universities ELECTRONICS ◽

10.24151/1561-5405-2019-24-3-239-247 ◽

2019 ◽

Vol 24 (3) ◽

pp. 239-247

Author(s):

Vladimir G. Ryabtsev ◽

◽

Sergey V. Volobuev ◽

Keyword(s):

System On Chip ◽

Self Test ◽

Built In Self Test ◽

On Chip ◽

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RF Phase Error Built-In-Self-Test for A GSM SOC

i-manager’s Journal on Electrical Engineering ◽

10.26634/jee.1.4.378 ◽

2008 ◽

Vol 1 (4) ◽

pp. 39-44

Author(s):

Dallas Webster ◽

Loi Phan ◽

Oren Eliezer ◽

Rick Hudgens ◽

Donald Lie

Keyword(s):

Phase Error ◽

Self Test ◽

Built In Self Test

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