Design and implementation of error detection and correction circuitry for multilevel memory protection
Potent Error Detection and Correction Making Use of Decimal Matrix Code for Reminiscence Reliability
2019 ◽
Vol 8
(9S3)
◽
pp. 700-704
Keyword(s):
2020 ◽
Vol 43
(2)
◽
pp. 169-195
◽
2012 ◽
Vol 36
(6)
◽
pp. 462-470
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