On the Exploration of a Low-Power Photonic Network Architecture

2020 ◽  
Vol 58 (9) ◽  
pp. 67-72
Author(s):  
Jing Wang ◽  
Zhongqi Li ◽  
Weigong Zhang ◽  
Tao Li
Keyword(s):  
Low Power ◽  
Network Architecture ◽  
Photonic Network

Low-Power Low-Latency Optical Network Architecture for Memory Access Communication

2016 ◽  
Vol 8 (10) ◽  
pp. 757 ◽  
Author(s):  
Yue Wang ◽  
Huaxi Gu ◽  
Kang Wang ◽  
Yintang Yang ◽  
Kun Wang
Keyword(s):  
Low Power ◽  
Network Architecture ◽  
Optical Network ◽  
Memory Access ◽  
Low Latency

scholarly journals Low power network on chip architectures: A survey

2020 ◽  
Vol 2 (3) ◽  
pp. 158-168
Author(s):  
Muhammad Raza Naqvi
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Network Architecture ◽  
High Performance ◽  
State Of The Art ◽  
Network On Chip ◽  
System On Chip ◽  
Power Network ◽  
Network Routers ◽  
On Chip

Mostly communication now days is done through SoC (system on chip) models so, NoC (network on chip) architecture is most appropriate solution for better performance. However, one of major flaws in this architecture is power consumption. To gain high performance through this type of architecture it is necessary to confirm power consumption while designing this. Use of power should be diminished in every region of network chip architecture. Lasting power consumption can be lessened by reaching alterations in network routers and other devices used to form that network. This research mainly focusses on state-of-the-art methods for designing NoC architecture and techniques to reduce power consumption in those architectures like, network architecture, network links between nodes, network design, and routers.

GMPLS Based Survivable Photonic Network Architecture

2007 ◽  
Vol E90-B (8) ◽  
pp. 1952-1959 ◽  
Author(s):  
W. IMAJUKU ◽  
T. OHARA ◽  
Y. SONE ◽  
I. SHAKE ◽  
Y. SAMESHIMA ◽  
...  
Keyword(s):  
Network Architecture ◽  
Photonic Network

scholarly journals Low-Power Reconfigurable Network Architecture for On-Chip Photonic Interconnects

2009 ◽  
Author(s):  
Iñigo Artundo ◽  
Wim Heirman ◽  
Mikel Loperena ◽  
Christof Debaes ◽  
Jan Van Campenhout ◽  
...  
Keyword(s):  
Low Power ◽  
Network Architecture ◽  
Photonic Interconnects ◽  
On Chip

Low-power nanophotonic devices based on photonic crystals towards dense photonic network on chip

2011 ◽  
Vol 5 (2) ◽  
pp. 84 ◽  
Author(s):  
M. Notomi ◽  
A. Shinya ◽  
K. Nozaki ◽  
T. Tanabe ◽  
S. Matsuo ◽  
...  
Keyword(s):  
Photonic Crystals ◽  
Low Power ◽  
Network On Chip ◽  
Nanophotonic Devices ◽  
Photonic Network ◽  
On Chip
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