High Speed-Low Power GNRFET based Digital to Analog Converters for ULSI applications

Author(s):  
Mounica Patnala ◽  
Trond Ytterdal ◽  
Maher Rizkalla
2006 ◽  
pp. 91-109 ◽  
Author(s):  
Konstantinos Doris ◽  
Arthur van Roermund

2012 ◽  
Vol 4 (3) ◽  
pp. 275-282 ◽  
Author(s):  
Behnam Sedighi ◽  
Mahdi Khafaji ◽  
Johann Christoph Scheytt

We present a method to realize a low-power and high-speed digital-to-analog converter (DAC) for system-on-chip applications. The new method is a combination of binary-weighted current cells and R-2R ladder and is specially suited for modern BiCMOS technologies. A prototype 5 GS/s DAC is implemented in 0.13 μm SiGe BiCMOS technology. The DAC dissipates 26 mW and provides an SFDR higher than 48 dB for output frequencies up to 1 GHz.


2018 ◽  
Vol 26 (6) ◽  
pp. 6758 ◽  
Author(s):  
Christian Schmidt ◽  
Christoph Kottke ◽  
Ronald Freund ◽  
Friedel Gerfers ◽  
Volker Jungnickel

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