FPGA implementation of image watermarking algorithm for a digital camera

Author(s):  
Hyun Lim ◽  
Soon-Young Park ◽  
Seong-Jun Kang ◽  
Wan-Hyun Cho
2012 ◽  
Vol 532-533 ◽  
pp. 1419-1423
Author(s):  
Fang Ming Liu ◽  
Xiao Zhong Pan

This paper presents an FPGA implementation of a semi-fragile watermarking-based algorithm for a digital camera. The architecture of digital authentication camera is discussed and a semi-fragile watermarking algorithm based the invariant property of DCT coefficients quantization is designed which can survive a certain amount of compression. The components of a digital camera and the watermarking algorithm are described in Verilog HDL and implemented on the DE2-70 board. The results shown that the hardware implementation can provide real time performance and resist off-line attacks compare with the software-assisted solution.


2013 ◽  
Vol 5 (1) ◽  
pp. 36-41
Author(s):  
R. Ganesh ◽  
◽  
Ch. Sandeep Reddy ◽  

Author(s):  
Jeniffer A ◽  
Haripasath S ◽  
Chinthamani S ◽  
Chitra G ◽  
Karthiga V

2002 ◽  
Vol 12 (4) ◽  
pp. 145-146
Author(s):  
Steven C. Chang
Keyword(s):  

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