Implementing MVC Decoding on Homogeneous NoCs: Circuit Switching or Wormhole Switching

Author(s):  
Ning Ma ◽  
Zhuo Zou ◽  
Zhonghai Lu ◽  
Lirong Zheng
2003 ◽  
Vol 04 (02) ◽  
pp. 179-197 ◽  
Author(s):  
Geyong Min ◽  
Mohamed Ould-Khaoua ◽  
Lewis M. Mackenzie

Switching techniques have a strong effect on the performance of interconnection networks. Many studies have shown that traffic loads in parallel computation environments can exhibit burstiness property. In order to obtain a deep understanding of the efficiency of switching techniques, this study proposes an analytical performance model for pipelined circuit switching (PCS) in binary n-cube networks under bursty traffic, which is modeled by a switched Poisson process (SPP). Simulation experiments demonstrate that the proposed model exhibits a good degree of accuracy. This model and the one proposed in Ref. [13] for wormhole switching (WS) are then applied to investigate the relative performance merits of PCS and WS in the presence of bursty loads.


2008 ◽  
Vol 18 (04) ◽  
pp. 567-587 ◽  
Author(s):  
ALEX K. JONES ◽  
SHUYI SHAO ◽  
YU ZHANG ◽  
RAMI MELHEM

Compiled communication can benefit the parallel application design and performance in several ways such as analyzing the communication pattern to optimize a configurable network for performance improvement or to visualize the communication requirements to study and improve the application design. In this article we present symbolic expression analysis techniques in a MPI parallel compiler. Symbolic expression analysis allows the identification and representation of the communication pattern and also assists in the determination of communication phases in MPI parallel applications at compile-time. We demonstrate that using compiler analysis based on symbolic expression analysis to determine the communication pattern can provide an accurate visualization of the communication requirements. Using information from the compiler to program a circuit switching interconnect in multiprocessor systems has the potential to achieve more efficient communication with lower cost compared to packet/wormhole switching. For example, we demonstrate that our compiler approach provides an average of 2.6 times improvement in message delay over a threshold-based runtime system for our benchmarks with a maximum improvement of 9.7 times.


2020 ◽  
Vol 6 (4) ◽  
pp. 53-62
Author(s):  
Majid T. Fard ◽  
Waqar A. Khan ◽  
Jiangbiao He ◽  
Nathan Weise ◽  
Mostafa Abarzadeh

An ‘ideal* converter would accept the power flow of a 3-phase a.c. system operating with sinusoidal voltage and current, and, without energy storage and by a continuous process, convert to or from d.c. Present-day converters rely, however, on repetitive circuit switching operations, more than 12 per cycle being generally uneconomic despite the cost of the energy storage components required in damping circuits and in the filters to maintain acceptable waveforms. Analysis of the operation of such converters is based on the mathematics of repetitive transients (Laplace and Fourier) and on the use of a d.c. transmission simulator, an extensive model at 10 -7 scale in power, which is also necessary in the development of complex electronic control circuits. There exists a great background of experience contributing to the design of most components of the power circuit. In contrast, the development of the switching device, whether thyristor stack or mercury arc valve, calls for advances in the state of art, both in scientific appreciation and in technology, which must be supported by full scale tests. There is little immediate prospect of the theoretical ‘ ideal * converter, but this is unimportant, provided that development leads to enhanced overall reliability.


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