A high resolution, multi-path gated ring oscillator based Vernier Time-to-Digital Converter

2011 Semiconductor Conference Dresden ◽

10.1109/scd.2011.6068695 ◽

2011 ◽

Author(s):

Majid Memarian Sorkhabi ◽

Siroos Toofan

Keyword(s):

High Resolution ◽

Ring Oscillator ◽

Digital Converter ◽

Time To Digital Converter

Download Full-text

A high resolution time-to-digital converter on FPGA for Time-Correlated Single Photon Counting

2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2012.6292166 ◽

2012 ◽

Author(s):

Qiuchen Yuan ◽

Bowei Zhang ◽

Jerry Wu ◽

Mona E. Zaghloul

Keyword(s):

High Resolution ◽

Single Photon ◽

Photon Counting ◽

Digital Converter ◽

Resolution Time ◽

Single Photon Counting ◽

Time To Digital Converter

Download Full-text

A 15b, Sub-10PS Resolution, Gateable Pseudo-Delay Ring Oscillator Time-to-Digital Converter for Wide Range RF Applications

2018 15th International Multi-Conference on Systems, Signals & Devices (SSD) ◽

10.1109/ssd.2018.8570699 ◽

2018 ◽

Author(s):

Mongia Mhiri ◽

Sehmi Saad ◽

Aymen Ben Hammadi ◽

Kamel Besbes

Keyword(s):

Ring Oscillator ◽

Digital Converter ◽

Time To Digital Converter ◽

Rf Applications

Download Full-text

A high resolution Time-to-Digital Converter (TDC) based on self-calibrated Digital-to-Time Converter (DTC)

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2017.8053013 ◽

2017 ◽

Author(s):

Tingbing Ouyang ◽

Bo Wang ◽

Lizhao Gao ◽

Jiangtao Gu ◽

Chao Zhang

Keyword(s):

High Resolution ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter

Download Full-text

Harmonic ring oscillator time-to-digital converter

2015 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2015.7168595 ◽

2015 ◽

Author(s):

Juan Pablo Caram ◽

Jeff Galloway ◽

J. Stevenson Kenney

Keyword(s):

Ring Oscillator ◽

Digital Converter ◽

Time To Digital Converter

Download Full-text

FPGA Based High Resolution Time to Digital Converter

Harnessing VLSI System Design with EDA Tools ◽

10.1007/978-94-007-1864-7_5 ◽

2011 ◽

pp. 127-146 ◽

Author(s):

Rajanish K. Kamat ◽

Santosh A. Shinde ◽

Pawan K. Gaikwad ◽

Hansraj Guhilot

Keyword(s):

High Resolution ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter

Download Full-text

A Design of CMOS PUF Based on Ring Oscillator and Time-to-Digital Converter

Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering - Industrial Networks and Intelligent Systems ◽

10.1007/978-3-030-77424-0_19 ◽

2021 ◽

pp. 233-242

Author(s):

Van-Phuc Hoang ◽

Quang Phuong Nguyen ◽

Van Trung Nguyen ◽

Thanh Trung Nguyen ◽

Xuan Nam Tran

Keyword(s):

Ring Oscillator ◽

Digital Converter ◽

Time To Digital Converter

Download Full-text

High resolution time-to-digital converter using low resources FPGA for time-of-flight measurement

Microelectronics Journal ◽

10.1016/j.mejo.2020.104822 ◽

2020 ◽

Vol 101 ◽

pp. 104822

Author(s):

Safwat M. Ramzy ◽

Khadiga Hares

Keyword(s):

High Resolution ◽

Time Of Flight ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter ◽

Flight Measurement

Download Full-text

A high resolution time-to-digital converter using two-level vernier delay line technique

2007 IEEE Nuclear Science Symposium Conference Record ◽

10.1109/nssmic.2007.4436330 ◽

2007 ◽

Author(s):

G. H. Li ◽

H. P. Chou

Keyword(s):

High Resolution ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter

Download Full-text

A wide-range, high-resolution time to digital converter using a three-level structure

2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) ◽

10.1109/edaps.2017.8276914 ◽

2017 ◽

Author(s):

Mei Jiang ◽

Yanzhe He

Keyword(s):

High Resolution ◽

Level Structure ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter ◽

Download Full-text

Energy Efficient All-Digital Phase Locked Loop Architecture Design on High Resolution Fast Clocking Time to Digital Converter (TDC) Using Model Prescient Control (MPC) Technique

Wireless Personal Communications ◽

10.1007/s11277-018-5371-8 ◽

2018 ◽

Vol 102 (4) ◽

pp. 3343-3359 ◽

Author(s):

T. M. Sathish Kumar ◽

P. S. Periasamy

Keyword(s):

High Resolution ◽

Energy Efficient ◽

Phase Locked Loop ◽

Architecture Design ◽

Digital Converter ◽

Time To Digital Converter ◽

Download Full-text