delay line
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2022 ◽  
Vol 503 ◽  
pp. 127438
Author(s):  
Ahmed Almaiman ◽  
Hao Song ◽  
Amir Minoofar ◽  
Haoqian Song ◽  
Runzhou Zhang ◽  
...  

Author(s):  
В.Н. Трухин ◽  
В.А. Соловьев ◽  
И.А. Мустафин ◽  
М.Ю. Чернов

We present the results of terahertz generation studies under excitation via femtosecond lasers pulses epitaxial films of InAs, which were synthesized on semi-insulating and highly doped GaAs substrates. It is shown that a terahertz emitter based on epitaxial InAs film grown on a heavily doped GaAs n-type substrate, has the same terahertz generation efficiency as the InAs-film emitter grown on a semi-isolating GaAs substrate, but it has a significantly better spectral resolution, which is mainly determined by the parameters of the optical delay line and the femtosecond laser’s stability.


2022 ◽  
Vol 20 (2) ◽  
pp. 021204
Author(s):  
Kai Wang ◽  
Haochen Tian ◽  
Fei Meng ◽  
Baike Lin ◽  
Shiying Cao ◽  
...  

2022 ◽  
pp. 1-1
Author(s):  
Marc-Antoine Bianki ◽  
Cedric Lemieux-Leduc ◽  
Regis Guertin ◽  
Yves-Alain Peter

Sensors ◽  
2021 ◽  
Vol 22 (1) ◽  
pp. 284
Author(s):  
Jiyun Tong ◽  
Sha Wang ◽  
Shuang Zhang ◽  
Mengdi Zhang ◽  
Ye Zhao ◽  
...  

This paper presents a low jitter All-Digital Delay-Locked Loop (ADDLL) with fast lock time and process immunity. A coarse locking algorithm is proposed to prevent harmonic locking with just a small increase in hardware resources. In order to effectively solve the dithering phenomenon after locking, a replica delay line and a modified binary search algorithm with two modes were introduced in our ADDLL, which can significantly reduce the peak-to-peak jitter of the replica delay line. In addition, digital codes for a replica delay line can be conveniently applied to the delay line of multi-channel Vernier TDC while maintaining consistency between channels. The proposed ADDLL has been designed in 55 nm CMOS technology. In addition, the post-layout simulation results show that when operated at 1.2 V, the proposed ADDLL locks within 37 cycles and has a closed-loop characteristic, the peak-to-peak and root-mean-square jitter at 800 MHz are 6.5 ps and 1.18 ps, respectively. The active area is 0.024 mm2 and the power consumption at 800 MHz is 6.92 mW. In order to verify the performance of the proposed ADDLL, an architecture of dual ADDLL is applied to Vernier TDC to stabilize the Vernier delay lines against the process, voltage, and temperature (PVT) variations. With a 600 MHz operating frequency, the TDC achieves a 10.7 ps resolution, and the proposed ADDLL can keep the resolution stable even if PVT varies.


2021 ◽  
Vol 11 (24) ◽  
pp. 11726
Author(s):  
Yuan Sun ◽  
Yana Jia ◽  
Yufeng Zhang ◽  
Lina Cheng ◽  
Yong Liang ◽  
...  

A surface acoustic wave (SAW) device is proposed for sensing current by employing the patterned FeGa thin film as the sensitive interface. The layered media structure of FeGa/SiO2/LiNbO3 was established to reveal the working principle of the sensors, and an SAW chip patterned by delay-line and operating at 150 MHz was fabricated photolithographically on 128° YX LiNbO3 substrate. The FeGa thin film with a larger magnetostrictive coefficient was sputtered onto the acoustic propagation path of the SAW chip to build the sensing device. The prepared device was connected into the differential oscillation loop to construct the current sensor. The FeGa thin film produces magnetostrictive strain and so-called ΔE effect at the magnetic field generated by the applied current, which modulates the SAW propagation velocity accordingly. The differential frequency signal was collected to characterize the measurand. Larger sensitivity of 37.9 kHz/A, low hysteresis error of 0.81%, excellent repeatability and stability were achieved in the experiments from the developed sensing device.


2021 ◽  
Author(s):  
Xiao Li ◽  
Liang-Liang Wang ◽  
Jia-shun Zhang ◽  
Wei Chen ◽  
Yue Wang ◽  
...  

Abstract A quantum key distribution transmitter chip based on hybrid‐integration of silica planar light‐wave circuit (PLC) and lithium niobates (LN) modulator PLC is presented. The silica part consists of a tunable directional coupler and 400 ps delay line, and the LN part is made up of a Y‐branch, with electro‐optic modulators on both arms. The two parts are facet‐coupled to form an asymmetric Mach‐Zehnder interferometer. We have successfully encoded and decoded four BB84 states at 156.25 MHz repetition rate. Fast phase‐encoding of 0 or π has been achieved, with interference fringe visibilities 78.53% and 82.68% for state |+> and |‐>, respectively. With the aid of an extra off‐chip LN intensity modulator, two time‐bin states have been prepared and the extinction ratios are 18.65 dB and 15.46 dB for state |0> and |1>, respectively.


2021 ◽  
Vol 2103 (1) ◽  
pp. 012059
Author(s):  
V V Vitko ◽  
R V Haponchyk ◽  
A A Nikitin ◽  
A B Ustinov

Abstract A bistability phenomenon in a ring resonator consisting of a delay line on surface spin waves and a microwave amplifier has been experimentally investigated. It is shown that an enhancement of the gain coefficient above a specified value provides an appearance of a hysteresis at the resonator transmission characteristic. A frequency range of the bistability broadens due to an increase of the gain coefficient as well as the external magnetic field. While the value of the gain is limited from above by a transition of the ring into a self-oscillating regime, an increase in the magnetic field from 1150 Oe up to 3150 Oe provides an expansion of the frequency range of the hysteresis from 77 kHz to 185 kHz.


2021 ◽  
Vol 92 (11) ◽  
pp. 114712
Author(s):  
Glib Mazin ◽  
Aleš Stejskal ◽  
Michal Dudka ◽  
Miroslav Ježek
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