Multiplierless reconfigurable processing element for mixed radix-2/3/4/5 FFTs

2017 IEEE International Workshop on Signal Processing Systems (SiPS) ◽

10.1109/sips.2017.8110007 ◽

2017 ◽

Author(s):

Fahad Qureshi ◽

Muazam Ali ◽

Jarmo Takala

Keyword(s):

Processing Element ◽

Reconfigurable Processing

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A novel coarse grain reconfigurable processing element architecture

2003 46th Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.2003.1562414 ◽

2006 ◽

Author(s):

A. Happonen ◽

E. Hemming ◽

M.J. Juntti

Keyword(s):

Processing Element ◽

Coarse Grain ◽

Reconfigurable Processing

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High speed vision processor with reconfigurable processing element array based on full-custom distributed memory

Japanese Journal of Applied Physics ◽

10.7567/jjap.55.04ef08 ◽

2016 ◽

Vol 55 (4S) ◽

pp. 04EF08

Author(s):

Zhe Chen ◽

Jie Yang ◽

Cong Shi ◽

Qi Qin ◽

Liyuan Liu ◽

...

Keyword(s):

Distributed Memory ◽

Processing Element ◽

Reconfigurable Processing ◽

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Multiplierless Reconfigurable Processing Element And Its Applications to DSP Kernels

2005 International Symposium on System-on-Chip ◽

10.1109/issoc.2005.1595637 ◽

2005 ◽

Author(s):

SangKyu Lee ◽

JeongEun Kim ◽

Namsub Kim ◽

Jinsang Kim ◽

Won-Kyung Cho

Keyword(s):

Processing Element ◽

Reconfigurable Processing

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A hardware-efficient architecture for multi-resolution motion estimation using fully reconfigurable processing element array

2011 IEEE International Conference on Multimedia and Expo ◽

10.1109/icme.2011.6011948 ◽

2011 ◽

Author(s):

Xianghu Ji ◽

Chuang Zhu ◽

Huizhu Jia ◽

Xiaodong Xie ◽

Haibin Yin

Keyword(s):

Motion Estimation ◽

Processing Element ◽

Reconfigurable Processing ◽

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Design and implementation of a GaAs systolic floating-point processing element

IEE Proceedings - Computers and Digital Techniques ◽

10.1049/ip-cdt:19960635 ◽

1996 ◽

Vol 143 (5) ◽

pp. 325

Author(s):

A. Beaumont-Smith ◽

W. Marwood ◽

C.C. Lim ◽

K. Eshraghian

Keyword(s):

Processing Element ◽

Floating Point ◽

Design And Implementation

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Buffer Controller-Based Multiple Processing Element Utilization for Dataflow Synthesis

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2010.2049388 ◽

2011 ◽

Vol 19 (7) ◽

pp. 1249-1262 ◽

Author(s):

Woohyung Chun ◽

Sungroh Yoon ◽

Sangjin Hong

Keyword(s):

Processing Element ◽

Multiple Processing

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Applying Reconfigurable Processing Technologies to Spaceborne Applications

2005 IEEE Aerospace Conference ◽

10.1109/aero.2005.1559548 ◽

2005 ◽

Author(s):

J.R. Marshall ◽

R.W. Berger

Keyword(s):

Processing Technologies ◽

Reconfigurable Processing

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A floating-point systolic array processing element with serial communication and built-in self-test

The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology ◽

10.1007/bf02106449 ◽

1994 ◽

Vol 8 (3) ◽

pp. 241-251

Author(s):

T. C. Davies ◽

D. Al-Khalili ◽

V. Szwarc

Keyword(s):

Systolic Array ◽

Array Processing ◽

Serial Communication ◽

Processing Element ◽

Floating Point ◽

Self Test ◽

Built In Self Test

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Design of fast fourier transform using processing element for real valued signal

2015 International Conference on Communications and Signal Processing (ICCSP) ◽

10.1109/iccsp.2015.7322752 ◽

2015 ◽

Author(s):

Ankush R. Kuralkar

Keyword(s):

Fourier Transform ◽

Fast Fourier Transform ◽

Processing Element

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A Reconfigurable Processing Unit for Digital Circuit Testing using Built-In Self-Test Techniques

2006 IEEE Instrumentation and Measurement Technology Conference Proceedings ◽

10.1109/imtc.2006.328406 ◽

2006 ◽

Author(s):

Mohammed Elbadri ◽

Voicu Groza ◽

Rami Abielmona ◽

Mansour Assaf

Keyword(s):

Digital Circuit ◽

Processing Unit ◽

Circuit Testing ◽

Reconfigurable Processing ◽

Digital Circuit Testing ◽

Self Test ◽

Built In Self Test

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