Analysis of optimization algorithms in automated test pattern generation for sequential circuits

Author(s):  
Majed M. Alateeq ◽  
Witold Pedrycz
2003 ◽  
Vol 01 (01) ◽  
pp. 79-91 ◽  
Author(s):  
AMARDEEP SINGH ◽  
SARBJEET SINGH

This paper presents a quantum search algorithm for Automated Test Pattern Generation (ATPG) of VLSI circuits. For given digital circuits, a neural network is created that represents the digital gates with their interconnections as neurons. This neural network is characterized by an energy function E, which is the mathematics representation of neural network. The solution of the energy function gives us the test vector. The test vector is a combination of input values of digital circuits that detects a particular fault. In this paper, specific aspects of quantum theory like superposition and quantum parallelism are applied to find the solution of this energy function. The algorithm developed is so efficient that it requires only [Formula: see text] (where N is the total number of vectors) iterations to find the desired test vector whereas in classical computing, it takes N/2 iterations. At the end, a comparison is made between exhaustive, simulated annealing and quantum based techniques. Experimental results show that the quantum search algorithms are more efficient than classical algorithms and can be applied with more efficiency.


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