Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References

2008 ◽  
Vol 55 (4) ◽  
pp. 990-998 ◽  
Author(s):  
E. Ozalevli ◽  
Haw-Jing Lo ◽  
P.E. Hasler
2012 ◽  
Vol 4 (3) ◽  
pp. 275-282 ◽  
Author(s):  
Behnam Sedighi ◽  
Mahdi Khafaji ◽  
Johann Christoph Scheytt

We present a method to realize a low-power and high-speed digital-to-analog converter (DAC) for system-on-chip applications. The new method is a combination of binary-weighted current cells and R-2R ladder and is specially suited for modern BiCMOS technologies. A prototype 5 GS/s DAC is implemented in 0.13 μm SiGe BiCMOS technology. The DAC dissipates 26 mW and provides an SFDR higher than 48 dB for output frequencies up to 1 GHz.


Author(s):  
Henry Chang ◽  
Edoardo Charbon ◽  
Umakanta Choudhury ◽  
Alper Demir ◽  
Eric Felt ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document