FPGA-Based Scalable and Power-Efficient Fluid Simulation using Floating-Point DSP Blocks
2017 ◽
Vol 28
(10)
◽
pp. 2823-2837
◽
2016 ◽
Vol 23
(7)
◽
pp. 1669-1681
◽
Keyword(s):
Area‐ and power‐efficient iterative single/double‐precision merged floating‐point multiplier on FPGA
2017 ◽
Vol 11
(4)
◽
pp. 149-158
◽
2017 ◽
Vol 51
◽
pp. 366-385
◽
Keyword(s):
2019 ◽
Vol 8
(4)
◽
pp. 8533-8538
Keyword(s):