A Power-Efficient Floating-Point Co-processor Design

2008 International Conference on Computer Science and Software Engineering ◽

10.1109/csse.2008.795 ◽

2008 ◽

Author(s):

Xunying Zhang ◽

Xubang Shen

Keyword(s):

Floating Point ◽

Processor Design ◽

Power Efficient

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A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition

Integration ◽

10.1016/j.vlsi.2019.02.008 ◽

2019 ◽

Vol 66 ◽

pp. 164-172

Author(s):

Xing Wei ◽

Haigang Yang ◽

Wei Li ◽

Zhihong Huang ◽

Tao Yin ◽

...

Keyword(s):

Binary Tree ◽

Tree Decomposition ◽

Floating Point ◽

Processor Design ◽

Power Efficient ◽

Design And Implementation ◽

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Design of area and power efficient Radix-4 DIT FFT butterfly unit using floating point fused arithmetic

Journal of Central South University ◽

10.1007/s11771-016-3221-y ◽

2016 ◽

Vol 23 (7) ◽

pp. 1669-1681 ◽

Author(s):

E. Prabhu ◽

H. Mangalam ◽

S. Karthick

Keyword(s):

Floating Point ◽

Power Efficient

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FPGA Implementation of Power Efficient Floating Point Fused Multiply-Add Unit

2021 10th IEEE International Conference on Communication Systems and Network Technologies (CSNT) ◽

10.1109/csnt51715.2021.9509678 ◽

2021 ◽

Author(s):

K. Mounika ◽

P.V. Ramana

Keyword(s):

Fpga Implementation ◽

Floating Point ◽

Power Efficient

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FPGA-Based Scalable and Power-Efficient Fluid Simulation using Floating-Point DSP Blocks

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/tpds.2017.2691770 ◽

2017 ◽

Vol 28 (10) ◽

pp. 2823-2837 ◽

Author(s):

Kentaro Sano ◽

Satoru Yamamoto

Keyword(s):

Fluid Simulation ◽

Floating Point ◽

Power Efficient

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DeAr: A framework for power-efficient and flexible embedded digital signal processor design

2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) ◽

10.1109/apccas.2016.7804083 ◽

2016 ◽

Author(s):

Chi-Ming Lee ◽

Yong-Jyun Huang ◽

Chih-Wei Liu ◽

Yarsun Hsu

Keyword(s):

Digital Signal Processor ◽

Digital Signal ◽

Processor Design ◽

Power Efficient ◽

Signal Processor

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A unified flagged prefix constant addition-subtraction scheme for design of area and power efficient binary floating-point and constant integer arithmetic circuits

2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) ◽

10.1109/apccas.2014.7032721 ◽

2014 ◽

Author(s):

Soumya Ganguly ◽

Abhishek Mittal ◽

Syed Ershad Ahmed ◽

M.B. Srinivas

Keyword(s):

Arithmetic Circuits ◽

Floating Point ◽

Subtraction Scheme ◽

Power Efficient ◽

Integer Arithmetic ◽

Constant Addition

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Area‐ and power‐efficient iterative single/double‐precision merged floating‐point multiplier on FPGA

IET Computers & Digital Techniques ◽

10.1049/iet-cdt.2016.0100 ◽

2017 ◽

Vol 11 (4) ◽

pp. 149-158 ◽

Author(s):

Hao Zhang ◽

Dongdong Chen ◽

Seok‐Bum Ko

Keyword(s):

Floating Point ◽

Double Precision ◽

Power Efficient

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A novel power efficient 0.64-GFlops fused 32-bit reversible floating point arithmetic unit architecture for digital signal processing applications

Microprocessors and Microsystems ◽

10.1016/j.micpro.2017.01.002 ◽

2017 ◽

Vol 51 ◽

pp. 366-385 ◽

Author(s):

A.V. AnanthaLakshmi ◽

Gnanou Florence Sudha

Keyword(s):

Signal Processing ◽

Digital Signal Processing ◽

Digital Signal ◽

Floating Point ◽

Arithmetic Unit ◽

Power Efficient ◽

Floating Point Arithmetic ◽

Point Arithmetic

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Power efficient special processor design for burrows-wheeler-transform-based short read sequence alignment

2015 IEEE Biomedical Circuits and Systems Conference (BioCAS) ◽

10.1109/biocas.2015.7348380 ◽

2015 ◽

Author(s):

Nae-Chyun Chen ◽

Tai-Yin Chiu ◽

Yu-Cheng Li ◽

Yu-Chun Chien ◽

Yi-Chang Lu

Keyword(s):

Sequence Alignment ◽

Processor Design ◽

Power Efficient ◽

Short Read Sequence ◽

Special Processor ◽

Burrows Wheeler Transform

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SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design

Asia and South Pacific Conference on Design Automation, 2006. ◽

10.1109/aspdac.2006.1594675 ◽

2006 ◽

Author(s):

Hai Li ◽

Yiran Chen ◽

K. Roy ◽

Cheng-Kok Koh

Keyword(s):

Supply Voltage ◽

Processor Design ◽

Superscalar Processor ◽

Power Efficient ◽

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