A Space Vector Modulation Scheme to Reduce Common Mode Voltage for Cascaded Multilevel Inverters

2007 ◽  
Vol 22 (5) ◽  
pp. 1672-1681 ◽  
Author(s):  
Amit Kumar Gupta ◽  
Ashwin M. Khambadkone
Keyword(s):  
Modulation Scheme ◽  
Space Vector Modulation ◽  
Space Vector ◽  
Common Mode ◽  
Multilevel Inverters ◽  
Common Mode Voltage ◽  
Vector Modulation

A Space Vector Modulation Scheme of the Quasi-Z-Source Three-Level T-Type Inverter for Common-Mode Voltage Reduction

2018 ◽  
Vol 65 (10) ◽  
pp. 8340-8350 ◽  
Author(s):  
Changwei Qin ◽  
Chenghui Zhang ◽  
Alian Chen ◽  
Xiangyang Xing ◽  
Guangxian Zhang
Keyword(s):  
Modulation Scheme ◽  
Space Vector Modulation ◽  
Space Vector ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Vector Modulation

scholarly journals A Sub-Region Based Space Vector Modulation Scheme for Dual 2-Level Inverter System

2018 ◽  
Vol 8 (6) ◽  
pp. 4902
Author(s):  
R. Palanisamy ◽  
A. Velu ◽  
K. Selvakumar ◽  
D. Karthikeyan ◽  
D. Selvabharathi ◽  
...  
Keyword(s):  
Output Voltage ◽  
Modulation Scheme ◽  
Space Vector Modulation ◽  
Switching Loss ◽  
Space Vector ◽  
Dc Voltage ◽  
Multilevel Inverters ◽  
Harmonic Content ◽  
Voltage Stress ◽  
Vector Modulation

This paper deals the implementation of 3-level output voltage using dual 2-level inverter with control of sub-region based Space Vector Modulation (SR-SVM). Switching loss and voltage stress are the most important issues in multilevel inverters, for keep away from these problems dual inverter system executed. Using this proposed system, the conventional 3-level inverter voltage vectors and switching vectors can be located. In neutral point clamped multilevel inverter, it carries more load current fluctuations due to the DC link capacitors and it requires large capacitors. Based on the sub-region SVM used to control IGBT switches placed in the dual inverter system. The proposed system improves the output voltage with reduced harmonic content with improved dc voltage utilisation. The simulation and hardware results are verified using matlab/simulink and dsPIC microcontroller.

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