High throughput hardware architecture for (1440,1344) low-density parity-check code utilizing quasi-cyclic structure

2008 ◽  
Author(s):  
Hiroyuki Yamagishi ◽  
Makoto Noda
Keyword(s):  
High Throughput ◽  
Hardware Architecture ◽  
Low Density ◽  
Cyclic Structure ◽  
Parity Check ◽  
Low Density Parity Check

High‐throughput 2 bit low‐density parity‐check forward error correction for C‐RAN optical fronthaul based on a hard‐decision algorithm

2019 ◽  
Vol 13 (2) ◽  
pp. 111-116 ◽  
Author(s):  
Ao Li ◽  
Vahid Meghdadi ◽  
Jean‐Pierre Cances ◽  
Christelle Aupetit‐Berthelemot
Keyword(s):  
Error Correction ◽  
High Throughput ◽  
Forward Error Correction ◽  
Low Density ◽  
Parity Check ◽  
Decision Algorithm ◽  
Low Density Parity Check ◽  
Forward Error ◽  
Hard Decision

scholarly journals High-throughput decoder for low-density parity-check code

2006 ◽  
Author(s):  
Tatsuyuki Ishikawa ◽  
Kazunori Shimizu ◽  
Takeshi Ikenaga ◽  
Satoshi Goto
Keyword(s):  
High Throughput ◽  
Low Density ◽  
Parity Check ◽  
Low Density Parity Check
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