Low Complexity and Critical Path Based VLSI Architecture for LMS Adaptive Filter Using Distributed Arithmetic

2017 ◽  
Author(s):  
Mphd Tasleem Khan ◽  
Shaik Rafi Ahamed ◽  
Forrest Brewer
Keyword(s):  
Adaptive Filter ◽  
Critical Path ◽  
Vlsi Architecture ◽  
Low Complexity ◽  
Distributed Arithmetic

A Memory Efficient, Multiplierless & Modular VLSI Architecture of 1D/2D Re-Configurable 9/7 & 5/3 DWT Filters Using Distributed Arithmetic

2020 ◽  
Vol 29 (09) ◽  
pp. 2050151
Author(s):  
Anirban Chakraborty ◽  
Ayan Banerjee
Keyword(s):  
Real Time ◽  
Critical Path ◽  
Vlsi Architecture ◽  
Computation Time ◽  
Discrete Wavelet ◽  
Path Delay ◽  
Distributed Arithmetic ◽  
Real Time Imaging ◽  
Input Mode ◽  
Memory Efficient

Dedicated hardware for “Discrete Wavelet Transform” (DWT) is at high demand for real-time imaging operations in any standalone electronic devices, as DWT is being extensively utilized for most of the transform-domain imagery applications. Various DWT algorithms exist in the literature facilitating its software implementations which are generally unsuitable for real-time imaging in any stand-alone devices due to their power intensiveness and huge computation time. In this paper, a convolutional DWT-based pipelined and tunable VLSI architecture of Daubechies 9/7 and 5/3 DWT filter is presented. Our proposed architecture, which mingles the advantages of convolutional and lifting DWT while discarding their notable disadvantages, is made area and memory efficient by exploiting “Distributed Arithmetic’ (DA) in our own ingenious way. Almost 90% reduction in the memory size than other notable architectures is reported. In our proposed architecture, both the 9/7 and 5/3 DWT filters can be realized with a selection input, “mode”. With the introduction of DA, pipelining and parallelism are easily incorporated into our proposed 1D/2D DWT architectures. The area requirement and critical path delay are reduced to almost 38.3% and 50% than that of the latest remarkable designs. The performance of the proposed VLSI architecture also excels in real-time applications.

A Crystal View on the Design of FIR Filter

2020 ◽  
Vol 17 (9) ◽  
pp. 4235-4238
Author(s):  
R. Rohini ◽  
N. V. Satya Narayana ◽  
Durgesh Nandan
Keyword(s):  
High Speed ◽  
Critical Path ◽  
Sampling Rate ◽  
Vlsi Architecture ◽  
Complete Information ◽  
Low Complexity ◽  
Fir Filter ◽  
Main Element ◽  
Fir Filters ◽  
Hybrid Form

In audio and video signal processing main element is the FIR filter. This paper presents complete information regarding the FIR filters. It also focuses on the design of FIR filters which provide low-area, energy-delay, low-power consumption, high-speed, low critical path, and low complexity. Implementation of FIR filters with different methods like memory-based VLSI architecture, filters for sampling rate conversion, linear phase FIR filters, optimal hybrid form FIR filters, Nyquist filters, hybrid multiplier less FIR filters, low complexity FIR filters, variable partition hybrid form FIR filters, area efficiency FIR filters are discussed in this paper. The objective of this paper to provide all related information regarding FIR filters at one platform.

scholarly journals FPGA based least mean square algorithm for noise cancellation in communication system

2018 ◽  
Vol 7 (3.3) ◽  
pp. 165
Author(s):  
Praveen Reddy ◽  
Dr Baswaraj Gadgay
Keyword(s):  
Adaptive Filter ◽  
Communication System ◽  
Noise Cancellation ◽  
Mean Square ◽  
Least Mean Square ◽  
Distributed Arithmetic ◽  
Negative Effect ◽  
Least Mean Square Algorithm ◽  
Design Comparison

We present modified Distributed Arithmetic (DA) based architecture for LMS Adaptive filter which has improved the throughput of the filter also area and power has been comparatively been reduced. As we know, the adaptive filter uses continuous recalculation and generation of new coefficients will generate the negative effect on the use of algorithm. We have used a special temporary LUT addressing technique has overcome the issues resulting in better performance and good results. In this paper, we have discussed about the adaptive filter and implementation of DA adaptive filter and also discussed the results obtained from the design. Comparison with traditional de-sign has also been done to show the effectiveness of the algorithm.   

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