OBJECT ORIENTED DESIGN, MODULAR ANALYSIS, AND FAULT-TOLERANCE OF REAL-TIME CONTROL SOFTWARE SYSTEMS

Author(s):  
ANGELO PERKUSICH ◽  
MARIA L.B. PERKUSICH ◽  
SHI-KUO CHANG

When specifying, designing and analyzing complex real-time systems, it is necessary to adopt a modular or compositional methodology. This methodology shall allow the designer the ability to verify local properties of individual modules or components in the system, and also shall allow the verification of the correct behavior of interacting components. The application of Petri nets for the modeling and verification of systems, at specification and design levels are well known. Despite the powerful structuring mechanisms available in the Petri nets theory for the construction of the model of complex systems, the designer is still likely to face the problem of state explosion, when analyzing and verifying large systems. In this work we introduce a modular analysis methodology for a kind of high level Petri nets named G-Nets.

Author(s):  
Giorgio Bruno ◽  
Andrea Castella ◽  
Gianpaolo Macario ◽  
Marco P. Pescarmona

Author(s):  
N. Belala ◽  
D.E. Saїdouni ◽  
R. Boukharrou ◽  
A.C. Chaouche ◽  
A. Seraoui ◽  
...  

The design of real-time systems needs a high-level specification model supporting at the same time timing constraints and actions duration. The authors introduce in this paper an extension of Petri Nets called Time Petri Nets with Action Duration (DTPN) where time is associated with transitions. In DTPN, the firing of transitions is bound to a time interval and transitions represent actions which have explicit durations. The authors give an operational semantics for DTPN in terms of Durational Action Timed Automata (DATA). DTPN considers both timing constraints and durations under a true-concurrency semantics with an aim of better expressing concurrent and parallel behaviours of real-time systems.


2014 ◽  
Vol 945-949 ◽  
pp. 1372-1375
Author(s):  
Peng Zhang ◽  
Qin Guo ◽  
Bin Wang

Through the analysis of RTLinux source code and real-time performance of various testing experiment on the RTLinux, and its application in a distributed robot control system using CAN bus, realize the real-time control of robot joints. Write the code of real-time module on RTLinux, analyzing the real-time performance using related kernel time testing function. Under Linux using QT write user interface for robot control, running on the Linux user space. The interface program and the real-time program communicate via RT-FIFO. Specify the location of each robot joint in the interface program, compared with the feedback from the actual joint position trajectory, evaluate the control effect of real-time systems.


Electronics ◽  
2021 ◽  
Vol 10 (20) ◽  
pp. 2462
Author(s):  
Cosmin-Constantin Mihai ◽  
Ciprian Lupu

Graphics processing units and video cards have seen a surge of usage in domains other than graphics computers, due to advances in hardware and software technologies; however, little uptake has been in the domain of systems engineering and real time control. This research article will demonstrate the use of video cards in multimodel adaptive robust control, using openGL and compute shaders. A software simulation will show the behavior of the adaptive robust multimodel control scheme as the target process is exposed to both parametric and structural disturbances and will show the viability of using graphics processing units in real time systems control.


1991 ◽  
Vol 138 (5) ◽  
pp. 474 ◽  
Author(s):  
P. Cofrancesco ◽  
A. Cristoforetti ◽  
R. Scattolini

Electronics ◽  
2019 ◽  
Vol 8 (2) ◽  
pp. 211 ◽  
Author(s):  
Ionel Zagan ◽  
Vasile Găitan

The task context switch operation, the inter-task synchronization and communication mechanisms, as well as the jitter occurred in treating aperiodic events, are crucial factors in implementing real-time operating systems (RTOS). In practice and literature, several solutions can be identified for improving the response speed and performance of real-time systems. Software implementations of RTOS-specific functions can generate significant delays, adversely affecting the deadlines required for certain applications. This paper presents an original implementation of a dedicated processor, based on multiple pipeline registers, and a hardware support for a dynamic scheduler with the following characteristics: performs unitary event management, provides access to architecture shared resources, prioritizes and executes the multiple events expected by the same task. The paper also presents a method through which interrupts are assigned to tasks. Through dedicated instructions, the integrated hardware scheduler implements tasks synchronization with multiple prioritized events, thus ensuring an efficient functioning of the processor in the context of real-time control.


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