A New SEN Minus: Design and Reliability Measures

2016 ◽  
Vol 23 (04) ◽  
pp. 1650012 ◽  
Author(s):  
Shilpa Gupta ◽  
G. L. Pahuja
Keyword(s):  
Interconnection Networks ◽  
Fault Tolerant ◽  
Network Size ◽  
Specific Class ◽  
Multistage Interconnection Networks ◽  
Multiprocessing Systems ◽  
Reliability Performance ◽  
Exchange Network ◽  
Partial Connectivity ◽  
Shuffle Exchange Network

Multistage interconnection networks (MIN) are becoming attractive choice as they provide fast and efficient communication at reasonable cost, for multiprocessing systems. Shuffle exchange network (SEN) are specific class of MIN characterized as lowest cost unipath MIN. Several developments have made SEN MIN fault tolerant with redundant paths by increasing the number or size of switching elements (SE). However, recently [Formula: see text] has been advanced by reducing the number of stages, but has serious limitation namely: (i) partial connectivity of each source–destination pair, (ii) unique path. A new method has been proposed in this paper to develop a new topology of MIN with one stage less than the basic unipath MIN of same class with multiple and disjoint path facility that mitigates the shortcomings of the above network and is truly [Formula: see text] MIN. Due to less number of stages used in the proposed network communication delays are also reduced as the path length is reduced. Parametric performances such as Terminal, Broadcast and Network Reliabilities, MTTF, Bandwidth have been computed for different network sizes and demonstrated that it not only outperforms other SEN variants, but has improved features of fault tolerance all because of disjoint minimal path set. Further the comments generated previously in literature about better reliability performance of [Formula: see text] than other two networks [Formula: see text] have been refuted and have demonstrated that [Formula: see text]2 network has better performance than other two for larger network size. Also it can be concluded that the performance of proposed [Formula: see text] is best among all these networks.

Design of Fault Tolerant Shuffle Exchange Gamma Interconnection Network Layouts

2017 ◽  
Vol 17 (02) ◽  
pp. 1750005 ◽  
Author(s):  
GAURAV KHANNA ◽  
RAJESH MISHRA ◽  
S. K. CHATURVEDI
Keyword(s):  
Interconnection Networks ◽  
Fault Tolerant ◽  
Interconnection Network ◽  
Cost Effective ◽  
Disjoint Paths ◽  
Multiple Processors ◽  
Memory Modules ◽  
Telephone Industry ◽  
Exchange Network ◽  
Shuffle Exchange Network

Advancement in technology has resulted in increased computing power with the use of multiple processors within a system. These multiple processors need to communicate with each other and with memory modules. Multistage Interconnection Networks (MINs) provide a communication medium in such multi-processor systems by interconnecting a number of processors and memory modules. Besides, MINs also provide a cost effective substitute to costly crossbars in parallel computers and switching systems in telephone industry. This paper introduces two new fault-tolerant MINs named as Shuffle Exchange Gamma Interconnection Networks (SEGIN-1 and SEGIN-2). SEGIN-1 and SEGIN-2 can be obtained by altering Shuffle Exchange Network with one extra stage (SEN+) and provide two disjoint paths similar to it. Performance of SEGIN-1 and SEGIN-2 has been evaluated in terms of alternative paths, disjoint paths, reliability and hardware cost, and is compared with some very famous MINs like Shuffle Exchange Network (SEN), Shuffle Exchange Network with one extra stage (SEN+), Shuffle Exchange Network with two extra stage (SEN+2), Extra Stage Cube (ESC) and Gamma Interconnection Network (GIN). Results suggest that SEGINs surpass all the compared networks; hence, the proposed designs seem to be suitable for implementing practical interconnection networks.

EFFICIENT ROUTING ALGORITHMS FOR GENERALIZED SHUFFLE-EXCHANGE NETWORKS

2009 ◽  
Vol 01 (02) ◽  
pp. 267-281 ◽  
Author(s):  
JAMES K. LAN ◽  
WELL Y. CHOU ◽  
CHIUYUAN CHEN
Keyword(s):  
Explicit Formula ◽  
Interconnection Networks ◽  
Routing Algorithm ◽  
Routing Algorithms ◽  
Multistage Interconnection Networks ◽  
Exchange Networks ◽  
Routing Table ◽  
Computation Process ◽  
Exchange Network ◽  
Shuffle Exchange Network

The shuffle-exchange network has been proposed as a popular architecture for multistage interconnection networks. In 1991, Padmanabhan introduced the generalized shuffle-exchange network (GSEN) and proposed an efficient routing algorithm. Later, Chen et al. further enhanced the GSEN with bidirectional links and proposed the bidirectional GSEN (BGSEN). A BGSEN consists of the forward and the backward network. Based on the idea of inversely using the control tag generated by Padmanabhan's algorithm, Chen et al. proposed a routing algorithm for the backward network. Recently, Chen and Lou also proposed a routing algorithm for the backward network. It should be noted, however, that Padmanabhan's algorithm is actually an explicit formula for computing the control tag for routing and takes only O(1) time. Neither the algorithm of Chen et al. nor the algorithm of Chen and Lou provides an explicit formula for computing the control tag for routing and both algorithms take at least Ω(n) time, where n + 1 is the number of stages in the BGSEN. This paper attempts to propose an explicit formula for computing the control tag for routing in the backward network. We will demonstrate how this formula greatly simplifies the computation process and how it leads to efficient routing algorithms. In particular, an O(1)-time one-to-one routing algorithm and an efficient routing-table construction algorithm have been proposed.

Designing a New Class of Fault Tolerant Multistage Interconnection Networks

2005 ◽  
Vol 06 (04) ◽  
pp. 361-382 ◽  
Author(s):  
K. V. Arya ◽  
R. K. Ghosh
Keyword(s):  
Fault Tolerance ◽  
Interconnection Networks ◽  
Fault Tolerant ◽  
Interconnection Network ◽  
Multistage Interconnection Networks ◽  
Multistage Interconnection Network ◽  
New Class

This paper proposes a technique to modify a Multistage Interconnection Network (MIN) to augment it with fault tolerant capabilities. The augmented MIN is referred to as Enhanced MIN (E-MIN). The technique employed for construction of E-MIN is compared with the two known physical fault tolerance techniques, namely, extra staging and chaining. EMINs are found to be more generic than extra staged networks and less expensive than chained networks. The EMIN realizes all the permutations realizable by the original MIN. The routing strategies under faulty and fault free conditions are shown to be very simple in the case of E-MINs.

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