In-plane magnetic field-driven symmetry breaking in topological insulator-based three-terminal junctions

Topological surface states of three-dimensional topological insulator nanoribbons and their distinct magnetoconductance properties are promising for topoelectronic applications and topological quantum computation. A crucial building block for nanoribbon-based circuits are three-terminal junctions. While the transport of topological surface states on a planar boundary is not directly affected by an in-plane magnetic field, the orbital effect cannot be neglected when the surface states are confined to the boundary of a nanoribbon geometry. Here, we report on the magnetotransport properties of such three-terminal junctions. We observe a dependence of the current on the in-plane magnetic field, with a distinct steering pattern of the surface state current towards a preferred output terminal for different magnetic field orientations. We demonstrate that this steering effect originates from the orbital effect, trapping the phase-coherent surface states in the different legs of the junction on opposite sides of the nanoribbon and breaking the left-right symmetry of the transmission across the junction. The reported magnetotransport properties demonstrate that an in-plane magnetic field is not only relevant but also very useful for the characterization and manipulation of transport in three-dimensional topological insulator nanoribbon-based junctions and circuits, acting as a topoelectric current switch.

Semi-analytical modelling and evaluation of uniformly doped silicene nanotransistors for digital logic gates

Silicene has attracted remarkable attention in the semiconductor research community due to its silicon (Si) nature. It is predicted as one of the most promising candidates for the next generation nanoelectronic devices. In this paper, an efficient non-iterative technique is employed to create the SPICE models for p-type and n-type uniformly doped silicene field-effect transistors (FETs). The current-voltage characteristics show that the proposed silicene FET models exhibit high on-to-off current ratio under ballistic transport. In order to obtain practical digital logic timing diagrams, a parasitic load capacitance, which is dependent on the interconnect length, is attached at the output terminal of the logic circuits. Furthermore, the key circuit performance metrics, including the propagation delay, average power, power-delay product and energy-delay product of the proposed silicene-based logic gates are extracted and benchmarked with published results. The effects of the interconnect length to the propagation delay and average power are also investigated. The results of this work further envisage the uniformly doped silicene as a promising candidate for future nanoelectronic applications.

Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps

In this work, we analyze the impact of output filter design techniques aimed to reduce conducted emissions at the output of a DCDC power converter. A thorough analysis, based on high-frequency circuit models of the converter, is performed to assess expected improvements offered by different design strategies. This analysis is then confronted with measurements of conducted emissions at the output of a 300 W 48 V to 12 V Phase Shift Full Bridge (PSFB) prototype. Those experimental results demonstrate that a symmetric arrangement of the output LC filter and a direct bonding of the return output terminal of the converter to chassis are effective to reduce common mode conducted emissions at the output. Those results also demonstrate that the symmetry of the output LC filter can reduce conducted emissions in differential mode at high frequencies, where common mode to differential mode conversion is the predominant contribution to differential mode noise. However, direct bonding to chassis of the return output terminal may be ineffective at high frequencies due to the parasitic inductance associated with this connection. Main conclusions drawn for this analysis are applicable in general for isolated converters with a high voltage step between high and low voltage sides. Since the techniques of reduction of conducted emissions studied here do not increase the number of filter components, they are especially suitable for applications where high power density is an important requirement, e.g., aerospace or automotive applications.

Rancang Bangun Sistem Mini Pembangkit Listrik Tenaga Surya (PLTS) Portable

Energi alternatif merupakan salah satu solusi tepat dalam pemenuhan energi listrik yang bersumber dari bahan bakar fosil karena dipandang energi terbarukan dan ramah lingkunan. Tujuan dari penelitian ini adalah melakukan perancangan dan membuat suatu perangkat mini portable PLTS untuk petani dan nelayan di daerah terpencil. Penelitian ini dilakukan dengan melakukan perancanan dan pembuatan alat. Selanjutnya dilakukan pemgukuran tegangan dan arus pada outrput ke lampu DC dan port charger HP. Hasil penelitian menunjukkan alat dapat bekerja dengan baik dengan mampu menyalakan perangkat lampu DC dan mencharger HP pada perangkat outpunya. Hasil pengukuran pada output terminal lampu DC menunjukkan tegangan yang dihasilkan berkisar pada 12,44 – 12,54 Volt sementara untuk arus konstan pada 0,86 Ampere. Sementara pengukuran pada terminal charger HP diperoleh 4,95 – 5,2 Volt dan arus konstan pada nilai 0,54 Ampere.

Enhanced LVRT capability of Wind Turbine based on DFIG using Dynamic Voltage Restorer controlled by ADRC-based Feedback control

For grid-connected DFIG-based wind turbine, Fault Ride Through (FRT) or Low Voltage Ride Through (LVRT) capability is vital problem that need to be improved. This paper proposes an Active Disturbance Rejection Control (ADRC) strategy applied to Doubly Fed Induction Generator (DFIG) based Wind turbine (WT), which integrates a Dynamic Voltage Restorer (DVR). The DVR connect in series the DFIG output terminal and the utility grid. The ADRC scheme of the new topology DFIG-based WT with integrated DVR is designed to compensate grid voltage disturbances, which in turn meet LVRT requirement and increase the level of wind power penetration. The performance of this WT-DFIG-DVR structure is investigated in different operating scenarios in order to show the skills of the designed controllers.

Distributed Generation Control Using Modified PLL Based on Proportional-Resonant Controller

Due to the increasing necessity for electrical demand, the microgrids (MGs) based on distributed generations (DGs) within power electronic interfaces are being extended to improve the traditional network control. One of the common ways to achieve power sharing among the resources on an islanding MG is to use the droop control approach, performing based on proportional-integrator (PI) controllers. However, due to the effect of feeder impedance, obtaining the reactive power sharing using this method is not accurate and leads to overload in some DGs, resulting in the output terminal voltage of each DG going outside of the allowable range. The second problem arises when the frequency measurement is not performed precisely, leading to inaccurate active power sharing, which can be solved by using an improved phase locked loop (PLL). Therefore, the purpose of this paper is to propose an applicable and simple approach based on the use of conventional droop characteristics and a proportional-resonant (PR) controller in a DG control system. Due to the load changes in the microgrid and other contingencies, the proposed PLL-based controller is able to represent supreme performance with low error in several case studies.

SEGIN-Minus: A New Approach to Design Reliable and Fault-Tolerant MIN

Background: VLSI technology advancements have resulted the requirements of high computational power, which can be achieved by implementing multiple processors in parallel. These multiple processors have to communicate with their memory modules by using Interconnection Networks (IN). Multistage Interconnection Networks (MIN) are used as IN, as they provide efficient computing with low cost. Objective: the objective of the study is to introduce new reliable MIN named as a (Shuffle Exchange Gamma Interconnection Network Minus) SEGIN-Minus, which provide reliability and faulttolerance with less number of stages. Methods: MUX at input terminal and DEMUX at output terminal of SEGIN has been employed with reduction in one intermidiate stage. Fault tolerance has been introduced in the form of disjoint paths formed between each source-destnation node pair. Hence reliability has been improved. Results: Terminal, Broadcast and Network Reliability has been evaluated by using Reliability Block Diagrams for each source-destination node pair. The results have been shown, which depicts the hiher reliability values for newly proposed network. The cost analysis shows that new SEGINMinus is a cheaper network than SEGIN. Conclusion: SEGIN-Minus has better reliability and Fault-tolerance than priviously proposed SEGIN.

An Extensive Review of Multilevel Inverters Based on Their Multifaceted Structural Configuration, Triggering Methods and Applications

Power electronic converters are used to transform one form of energy to another. They are classified into four types depending upon the nature of the input and output voltages. The inverter is one among those types; it converts direct electrical current into alternating electrical current at desired frequency. Conventional types of inverters are capable of producing voltage at the output terminal that can only switch between two levels. The range of output voltage generated at the output is low when they are used for high power applications. To improve the voltage profile and efficiency of the overall system, multilevel inverters (MLIs) are introduced. In multilevel inverters the voltage at the output terminal is generated from several DC voltage levels fed at its input. The generated output is more appropriate to a sine wave and the dv/dt rating is also less leading to the reduction in EMI. Though they possess many advantages compared to the conventional inverters, the structural complexity and triggering techniques involved in designing multilevel inverters are high. Many studies are being carried out in defining new topologies of MLI with reduced switch as well as with the implementation of different PWM techniques. This paper will provide an extensive review on variety of MLI configurations based on the parameters such as the number of switches, switching techniques, symmetric, asymmetric, hybrid topologies, configurations based on applications, THD and power quality.

GaAs Solid State Broadband Power Amplifier for L and S Bands Applications

This chapter provides an insight view of the Broadband Power Amplifier (BPA) design. Basically, the aim of the BPA is to increase the power level of the signal presents at its input terminal up to a prefixed power level at its output terminal in the operating frequency band. The research of a GaAs single stage solid state broadband power amplifier based of ATF13876 which operates in the frequency band ranging from 1.17 GHz to 3 GHz is presented in this chapter. The wider bandwidth circuits are designed by using transmission lines which are intrinsically wideband circuits. With carefully designed biasing and broadband matching networks, unconditionally stability and excellent matching performance are fulfilled over the overall operating bandwidth with a maximum power gain of 17.34 dB and a saturated output power of 17 dBm. Considering the wider bandwidth of the proposed BPA, the latter compares favorably with the contemporary state-of-the-art.

High Output Impedance Current-Mode Universal First-Order Filter With Three Inputs Using One DDCC

Background: A current-mode universal first-order filter with three input terminals and one output terminal is presented. Methods: The proposed circuit uses one differential difference current conveyor (DDCC), one grounded capacitor and two resistors. Results: This circuit offers the following advantageous features: high output impedance, employing only one active component, using a grounded capacitor, the versatility to synthesize any type of first-order filter transfer functions. Conclusion: Each standard first-order filter function can be obtained by using only one current input signal from the proposed circuit.