scholarly journals Influences of Analog-to-Digital Conversion Accuracy and Response Uniformity of CCD on Small-Scale Laser Focal Spot Measurements

2021 ◽  
Vol 2021 ◽  
pp. 1-8
Author(s):  
Xiaoyan Liu ◽  
Dexin Ba ◽  
Deqiang Jiao ◽  
Xiangxin Shao ◽  
Xin Mu ◽  
...  

The two-dimensional snake scanning of the CCD method provides an effective solution to measure small-scale light spots which are smaller than one CCD pixel. The influences of the A/D conversion digits and response uniformity of the CCD on the measurement error are studied. When the A/D conversion digit is 20, the measurement error can be ignored. The maximum error value of the nonuniform response of the CCD pixel when the order of the super-Gaussian function is 10 is 0.7 μm. The research results can be used to guide the experiment.

Author(s):  
Neha Jain ◽  
Nir Shlezinger ◽  
Yonina C. Eldar ◽  
Anubha Gupta ◽  
Vivek Ashok Bohara

2021 ◽  
Vol 32 (3) ◽  
Author(s):  
Ruo-Shi Dong ◽  
Lei Zhao ◽  
Jia-Jun Qin ◽  
Wen-Tao Zhong ◽  
Yi-Chun Fan ◽  
...  

1993 ◽  
Vol 7 (4) ◽  
pp. 408 ◽  
Author(s):  
James R. Matey ◽  
M.J. Lauterbach

2017 ◽  
Author(s):  
Evgenii S. Kolodeznyi ◽  
Innokenty I. Novikov ◽  
Andrey V. Babichev ◽  
Alexander S. Kurochkin ◽  
Andrey G. Gladyshev ◽  
...  

2021 ◽  
pp. 127440
Author(s):  
Hao Chi ◽  
Qiulin Zhang ◽  
Shuna Yang ◽  
Bo Yang ◽  
Yanrong Zhai ◽  
...  

2007 ◽  
Vol 16 (01) ◽  
pp. 1-14
Author(s):  
TASKIN KOCAK ◽  
GEORGE R. HARRIS ◽  
RONALD F. DEMARA

In this paper, a novel architecture for self-timed analog-to-digital conversion is presented and designed using the NULL Convention Logic (NCL) paradigm. This analog-to-digital converter (ADC) employs successive approximation and a one-hot encoded masking technique to digitize analog signals. The architecture scales readily to any given resolution by utilizing the one-hot encoded scheme to permit identical logical components for each bit of resolution. The four-bit configuration of the proposed design has been implemented and assessed via simulation in 0.18-μm CMOS technology. Furthermore, the ADC may be interfaced with either synchronous or four-phase asynchronous digital systems.


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