A New Class of High-Capacity, Resource-Rich Field-Programmable Gate Arrays Enabled by Three- Dimensional Integration Chip-Stacked Silicon Interconnect Technology

Gate Arrays ◽

New Class ◽

Field Programmable ◽

Programmable Gate Arrays ◽

Interconnect Technology

Wiring requirement and three-dimensional integration technology for field programmable gate arrays

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2003.810003 ◽

2003 ◽

Vol 11 (1) ◽

pp. 44-54 ◽

Cited By ~ 58

Author(s):

A. Rahman ◽

S. Das ◽

A.P. Chandrakasan ◽

R. Reif

Keyword(s):

Three Dimensional ◽

Integration Technology ◽

Gate Arrays ◽

Field Programmable ◽

Proceedings of the Sixth International Conference on Engineering Computational Technology ◽

Acceleration of an Element-by-Element Preconditioned Conjugate Gradient Solver for Three-Dimensional Tetrahedral Finite Elements using Field Programmable Gate Arrays

10.4203/ccp.89.2 ◽

2009 ◽

Author(s):

J. Hu ◽

S.F. Quigley ◽

A.H.C. Chan

Keyword(s):

Finite Elements ◽

Conjugate Gradient ◽

Three Dimensional ◽

Preconditioned Conjugate Gradient ◽

Gate Arrays ◽

Field Programmable ◽

Programmable Gate Arrays ◽

Conjugate Gradient Solver

Algorithmic and Theoretical Problems Related to the Physical Design of Three Dimensional Field Programmable Gate Arrays

10.18130/v3br9d ◽

2000 ◽

Author(s):

John E. Karro

Keyword(s):

Three Dimensional ◽

Physical Design ◽

Gate Arrays ◽

Field Programmable ◽

Proceedings of the 2015 Conference on research in adaptive and convergent systems - RACS ◽

Online thermal-aware task placement in three-dimensional field-programmable gate arrays

10.1145/2811411.2811492 ◽

2015 ◽

Cited By ~ 2

Author(s):

Kuan-Wen Lin ◽

Ya-Shu Chen

Keyword(s):

Three Dimensional ◽

Gate Arrays ◽

Field Programmable ◽

Programmable Gate Arrays ◽

Task Placement

Proceedings of the 2001 international workshop on System-level interconnect prediction - SLIP '01 ◽

Wiring requirement and three-dimensional integration of field-programmable gate arrays

10.1145/368640.368739 ◽

2001 ◽

Cited By ~ 11

Author(s):

Arifur Rahman ◽

Shamik Das ◽

Anantha Chandraksan ◽

Rafael Reif

Keyword(s):

Three Dimensional ◽

Gate Arrays ◽

Field Programmable ◽

A Spiffy tool for the simultaneous placement and global routing for three-dimensional field-programmable gate arrays

Proceedings Ninth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1999.757418 ◽

2003 ◽

Cited By ~ 6

Author(s):

J. Karro ◽

J.P. Cohoon

Keyword(s):

Three Dimensional ◽

Global Routing ◽

Gate Arrays ◽

Field Programmable ◽

Proceedings of Eighth International Application Specific Integrated Circuits Conference ◽

Three-dimensional field-programmable gate arrays

10.1109/asic.1995.580726 ◽

2002 ◽

Cited By ~ 34

Author(s):

M.J. Alexander ◽

J.P. Cohoon ◽

J.L. Colflesh ◽

J. Karro ◽

G. Robins

Keyword(s):

Three Dimensional ◽

Gate Arrays ◽

Field Programmable ◽

Memory Requirement Reduction of Deep Neural Networks for Field Programmable Gate Arrays Using Low-Bit Quantization of Parameters

2020 28th European Signal Processing Conference (EUSIPCO) ◽

10.23919/eusipco47968.2020.9287739 ◽

2021 ◽

Author(s):

Niccolo Nicodemo ◽

Gaurav Naithani ◽

Konstantinos Drossos ◽

Tuomas Virtanen ◽

Roberto Saletti

Keyword(s):

Neural Networks ◽

Deep Neural Networks ◽

Memory Requirement ◽

Gate Arrays ◽

Field Programmable ◽

Optically Programmable Field Programmable Gate Arrays (FPGA) Systems

10.21236/ada421336 ◽

2004 ◽

Author(s):

Jose Mumbru ◽

George Panotopoulos ◽

Demetri Psaltis

Keyword(s):

Gate Arrays ◽

Field Programmable ◽

Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping

10.1007/3-540-57091-8 ◽

1993 ◽

Keyword(s):

Rapid Prototyping ◽

Gate Arrays ◽

Field Programmable ◽