SOI Interface Structures in Selective Epitaxial Growth

ABSTRACTSilicon-on-insulator structures were formed by the selective epitaxial growth (SEG) of silicon and the epitaxial lateral overgrowth (ELO) of oxide shapes using an LPCVD hot-walled reactor at 850°C. The homoepitaxial interface changed character with modifications of the gas composition during the in-situ pre-epitaxial bake at 900°C. HREM images show ellipsoid-shaped inclusions lying along the homoepitaxial interface for silicon growth conducted with no dichlorosilane (DCS) flow during the prebake in H2. SIMS analysis indicates a large oxygen, fluorine, and carbon concentration at the interface. For structures grown with a small DCS flow in addition to H2 during the prebake, the homoepitaxial structural defects and the oxygen, fluorine, and carbon peaks are removed.

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Modelling of selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO) of silicon in SiH/sub 2/Cl/sub 2/-HCl-H/sub 2/ system

Proceedings of the Eleventh Biennial University/Government/ Industry Microelectronics Symposium ◽

10.1109/ugim.1995.514138 ◽

2002 ◽

Author(s):

P. Kongetira ◽

G.W. Neudeck ◽

C.G. Takoudis

Keyword(s):

Epitaxial Growth ◽

Epitaxial Lateral Overgrowth ◽

Selective Epitaxial Growth ◽

Lateral Overgrowth

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Surface planarity and microstructure of low temperature silicon SEG and ELO

Journal of Materials Research ◽

10.1557/jmr.1991.0784 ◽

1991 ◽

Vol 6 (4) ◽

pp. 784-791 ◽

Cited By ~ 10

Author(s):

M.C. Arst ◽

K.N. Ritz ◽

S. Redkar ◽

J.O. Borland ◽

J. Hann ◽

...

Keyword(s):

Low Temperature ◽

Epitaxial Growth ◽

Leakage Current ◽

Epitaxial Lateral Overgrowth ◽

Selective Epitaxial Growth ◽

Lateral Overgrowth ◽

Interface Defects ◽

Interface Characteristics ◽

Standard Orientation ◽

Electrical Data

Surface planarity and epi/SiO2 interface characteristics of selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO), deposited at 800–950 °C/10 or 25 Torr, have been studied for micron-sized structures. SEG at 860 °C showed superior planarity and reduced ratio of facet width to epi thickness, compared to higher deposition temperatures. Data showed that epi/SiO2 interface defects are greatly reduced for structures parallel to (100) and/or by adding HCl to the source gas, compared to interfaces positioned at standard orientation (110) on a (100) substrate. The transition from SEG to ELO in view of the facet orientations will be discussed. To correlate structural with electrical data, n+/p diodes were fabricated on as-grown and polish planarized SEG. Leakage current values of approximately 100 nA/cm2 could be measured. These are comparable to similar n+/p junctions fabricated on conventional epi.

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